похоже в оптибуте это делается такой строкой
asm volatile ("clr __zero_reg__");
Указатель верхушки стека то же надо адресовать !
Командир, ты просто красава! прямо в точку. Помогло. Спасибо тебе огромное! я капец замучился с этой фигней. Я бы никогда не нашел проблему . маловато знаний.
да clr zero_reg только регистр r1 нулит.
я вставил в начало майн
__asm__ __volatile__ (
"eor r1, r1\n"
"out 0x3f, r1\n"
"ldi r28, 0xFF\n"
"ldi r29, 0x08\n"
"out 0x3e, r29\n"
"out 0x3d, r28\n"
);
по итогу листинг стал такой и заработало
Спойлер
optiboot_atmega328.elf: file format elf32-avr
Sections:
Idx Name Size VMA LMA File off Algn
0 .data 0000000e 00800100 00007ac6 00000b5a 2**0
CONTENTS, ALLOC, LOAD, DATA
1 .text 00000ac6 00007000 00007000 00000094 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .bss 00000015 0080010e 0080010e 00000b68 2**0
ALLOC
3 .comment 00000011 00000000 00000000 00000b68 2**0
CONTENTS, READONLY
4 .avr.prop 00000028 00000000 00000000 00000b79 2**0
CONTENTS, READONLY
5 .debug_aranges 00000088 00000000 00000000 00000ba8 2**3
CONTENTS, READONLY, DEBUGGING
6 .debug_info 00001d19 00000000 00000000 00000c30 2**0
CONTENTS, READONLY, DEBUGGING
7 .debug_abbrev 0000048d 00000000 00000000 00002949 2**0
CONTENTS, READONLY, DEBUGGING
8 .debug_line 00000ef7 00000000 00000000 00002dd6 2**0
CONTENTS, READONLY, DEBUGGING
9 .debug_frame 00000480 00000000 00000000 00003cd0 2**2
CONTENTS, READONLY, DEBUGGING
10 .debug_str 00000645 00000000 00000000 00004150 2**0
CONTENTS, READONLY, DEBUGGING
11 .debug_loc 00001a5f 00000000 00000000 00004795 2**0
CONTENTS, READONLY, DEBUGGING
12 .debug_ranges 00000030 00000000 00000000 000061f4 2**0
CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:
00007000 <__ctors_end>:
7000: 11 e0 ldi r17, 0x01 ; 1
7002: a0 e0 ldi r26, 0x00 ; 0
7004: b1 e0 ldi r27, 0x01 ; 1
7006: e6 ec ldi r30, 0xC6 ; 198
7008: fa e7 ldi r31, 0x7A ; 122
700a: 02 c0 rjmp .+4 ; 0x7010 <__ctors_end+0x10>
700c: 05 90 lpm r0, Z+
700e: 0d 92 st X+, r0
7010: ae 30 cpi r26, 0x0E ; 14
7012: b1 07 cpc r27, r17
7014: d9 f7 brne .-10 ; 0x700c <__ctors_end+0xc>
00007016 <__do_clear_bss>:
7016: 21 e0 ldi r18, 0x01 ; 1
7018: ae e0 ldi r26, 0x0E ; 14
701a: b1 e0 ldi r27, 0x01 ; 1
701c: 01 c0 rjmp .+2 ; 0x7020 <.do_clear_bss_start>
0000701e <.do_clear_bss_loop>:
701e: 1d 92 st X+, r1
00007020 <.do_clear_bss_start>:
7020: a3 32 cpi r26, 0x23 ; 35
7022: b2 07 cpc r27, r18
7024: e1 f7 brne .-8 ; 0x701e <.do_clear_bss_loop>
00007026 <main>:
int main(void)
{
__asm__ __volatile__ (
7026: 11 24 eor r1, r1
7028: 1f be out 0x3f, r1 ; 63
702a: cf ef ldi r28, 0xFF ; 255
702c: d8 e0 ldi r29, 0x08 ; 8
702e: de bf out 0x3e, r29 ; 62
7030: cd bf out 0x3d, r28 ; 61
);
//asm volatile ("clr __zero_reg__");
UCSR0A = _BV(U2X0); //Double speed mode USART0
7032: 82 e0 ldi r24, 0x02 ; 2
7034: 80 93 c0 00 sts 0x00C0, r24 ; 0x8000c0 <__DATA_REGION_ORIGIN__+0x60>
UCSR0B = _BV(RXEN0) | _BV(TXEN0);
7038: 88 e1 ldi r24, 0x18 ; 24
703a: 80 93 c1 00 sts 0x00C1, r24 ; 0x8000c1 <__DATA_REGION_ORIGIN__+0x61>
UCSR0C = _BV(UCSZ00) | _BV(UCSZ01);
703e: 86 e0 ldi r24, 0x06 ; 6
7040: 80 93 c2 00 sts 0x00C2, r24 ; 0x8000c2 <__DATA_REGION_ORIGIN__+0x62>
UBRR0L = (uint8_t)( (F_CPU + 500000L * 4L) / (500000L * 8L) - 1 );
7044: 83 e0 ldi r24, 0x03 ; 3
7046: 80 93 c4 00 sts 0x00C4, r24 ; 0x8000c4 <__DATA_REGION_ORIGIN__+0x64>
MCP_CAN(10);
704a: 8a e0 ldi r24, 0x0A ; 10
704c: 93 d3 rcall .+1830 ; 0x7774 <MCP_CAN>
putch(0x31); //1
704e: 81 e3 ldi r24, 0x31 ; 49
7050: 23 d0 rcall .+70 ; 0x7098 <putch>
mcp2515_begin(MCP_ANY, CAN_250KBPS, MCP_8MHZ);
7052: 42 e0 ldi r20, 0x02 ; 2
7054: 6c e0 ldi r22, 0x0C ; 12
7056: 83 e0 ldi r24, 0x03 ; 3
// -> set_modifity register ()
// -> mcp2515_modifity register ()
putch(0x32); //2
7058: 92 d3 rcall .+1828 ; 0x777e <mcp2515_begin>
705a: 82 e3 ldi r24, 0x32 ; 50
setMode(MCP_NORMAL);
705c: 1d d0 rcall .+58 ; 0x7098 <putch>
705e: 80 e0 ldi r24, 0x00 ; 0
putch(0x33); //3
7060: c7 d0 rcall .+398 ; 0x71f0 <setMode>
7062: 83 e3 ldi r24, 0x33 ; 51
7064: 19 d0 rcall .+50 ; 0x7098 <putch>
while(1)
{
putch(0x49);
7066: 89 e4 ldi r24, 0x49 ; 73
7068: 17 d0 rcall .+46 ; 0x7098 <putch>
706a: 00 e0 ldi r16, 0x00 ; 0
sendMsgBuf(0x444, (uint8_t)0, (uint8_t)1, data);
706c: 11 e0 ldi r17, 0x01 ; 1
706e: 21 e0 ldi r18, 0x01 ; 1
7070: 40 e0 ldi r20, 0x00 ; 0
7072: 64 e4 ldi r22, 0x44 ; 68
7074: 74 e0 ldi r23, 0x04 ; 4
7076: 80 e0 ldi r24, 0x00 ; 0
7078: 90 e0 ldi r25, 0x00 ; 0
707a: 7f d4 rcall .+2302 ; 0x797a <sendMsgBuf>
putch(0x50); //q
707c: 80 e5 ldi r24, 0x50 ; 80
707e: 0c d0 rcall .+24 ; 0x7098 <putch>
7080: 88 ec ldi r24, 0xC8 ; 200
byte incr = 0 ;
while (++incr<200) {_delay_ms(5);}
7082: 81 50 subi r24, 0x01 ; 1
7084: 11 f4 brne .+4 ; 0x708a <main+0x64>
7086: 81 e5 ldi r24, 0x51 ; 81
putch(0x51); //q
7088: ed cf rjmp .-38 ; 0x7064 <main+0x3e>
708a: ef e1 ldi r30, 0x1F ; 31
#else
//round up by default
__ticks_dc = (uint32_t)(ceil(fabs(__tmp)));
#endif
__builtin_avr_delay_cycles(__ticks_dc);
708c: fe e4 ldi r31, 0x4E ; 78
708e: 31 97 sbiw r30, 0x01 ; 1
7090: f1 f7 brne .-4 ; 0x708e <main+0x68>
7092: 00 c0 rjmp .+0 ; 0x7094 <main+0x6e>
7094: 00 00 nop
7096: f5 cf rjmp .-22 ; 0x7082 <main+0x5c>
00007098 <putch>:
7098: 90 91 c0 00 lds r25, 0x00C0 ; 0x8000c0 <__DATA_REGION_ORIGIN__+0x60>
inline static void putch(uint8_t ch)
{
while (!(UCSR0A & _BV(UDRE0)));
709c: 95 ff sbrs r25, 5
709e: fc cf rjmp .-8 ; 0x7098 <putch>
UDR0 = ch;
70a0: 80 93 c6 00 sts 0x00C6, r24 ; 0x8000c6 <__DATA_REGION_ORIGIN__+0x66>
}
70a4: 08 95 ret
000070a6 <SPItransfer>:
SPSR = spsr;
}
inline static uint8_t SPItransfer(uint8_t data) {
SPDR = data;
70a6: 8e bd out 0x2e, r24 ; 46
asm volatile("nop");
70a8: 00 00 nop
while (!(SPSR & _BV(SPIF))) ; // wait
70aa: 0d b4 in r0, 0x2d ; 45
70ac: 07 fe sbrs r0, 7
70ae: fd cf rjmp .-6 ; 0x70aa <SPItransfer+0x4>
return SPDR;
70b0: 8e b5 in r24, 0x2e ; 46
}
70b2: 08 95 ret
000070b4 <SPIbeginTransaction.constprop.1>:
// Invert the SPI2X bit
clockDiv ^= 0x1;
spcr = _BV(SPE) | _BV(MSTR) | ((bitOrder == LSBFIRST) ? _BV(DORD) : 0) |
70b4: 80 e5 ldi r24, 0x50 ; 80
70b6: 80 93 20 01 sts 0x0120, r24 ; 0x800120 <spcr>
(dataMode & SPI_MODE_MASK) | ((clockDiv >> 1) & SPI_CLOCK_MASK);
spsr = clockDiv & SPI_2XCLOCK_MASK;
70ba: 91 e0 ldi r25, 0x01 ; 1
70bc: 90 93 0f 01 sts 0x010F, r25 ; 0x80010f <spsr>
SPCR = spcr;
70c0: 8c bd out 0x2c, r24 ; 44
SPSR = spsr;
70c2: 80 91 0f 01 lds r24, 0x010F ; 0x80010f <spsr>
70c6: 8d bd out 0x2d, r24 ; 45
}
70c8: 08 95 ret
000070ca <mcp2515_reset>:
#define spi_read() spi_readwrite(0x00)
void mcp2515_reset(void)
{
SPIbeginTransaction(10000000, MSBFIRST, SPI_MODE0);
70ca: f4 df rcall .-24 ; 0x70b4 <SPIbeginTransaction.constprop.1>
MCP2515_SELECT();
70cc: 2a 98 cbi 0x05, 2 ; 5
spi_readwrite(MCP_RESET);
70ce: 80 ec ldi r24, 0xC0 ; 192
70d0: ea df rcall .-44 ; 0x70a6 <SPItransfer>
MCP2515_UNSELECT();
70d2: 2a 9a sbi 0x05, 2 ; 5
#else
//round up by default
__ticks_dc = (uint32_t)(ceil(fabs(__tmp)));
#endif
__builtin_avr_delay_cycles(__ticks_dc);
70d4: 85 e3 ldi r24, 0x35 ; 53
70d6: 8a 95 dec r24
70d8: f1 f7 brne .-4 ; 0x70d6 <mcp2515_reset+0xc>
70da: 00 00 nop
_delay_us(10);
}
70dc: 08 95 ret
000070de <mcp2515_readRegister>:
/*********************************************************************************************************
** Function name: mcp2515_readRegister
** Descriptions: Read data register
*********************************************************************************************************/
uint8_t mcp2515_readRegister(const uint8_t address)
{
70de: cf 93 push r28
uint8_t ret;
SPIbeginTransaction(10000000, MSBFIRST, SPI_MODE0);
70e0: c8 2f mov r28, r24
MCP2515_SELECT();
70e2: e8 df rcall .-48 ; 0x70b4 <SPIbeginTransaction.constprop.1>
spi_readwrite(MCP_READ);
70e4: 2a 98 cbi 0x05, 2 ; 5
70e6: 83 e0 ldi r24, 0x03 ; 3
spi_readwrite(address);
70e8: de df rcall .-68 ; 0x70a6 <SPItransfer>
70ea: 8c 2f mov r24, r28
70ec: dc df rcall .-72 ; 0x70a6 <SPItransfer>
ret = spi_read();
70ee: 80 e0 ldi r24, 0x00 ; 0
70f0: da df rcall .-76 ; 0x70a6 <SPItransfer>
70f2: 2a 9a sbi 0x05, 2 ; 5
MCP2515_UNSELECT();
70f4: cf 91 pop r28
return ret;
}
70f6: 08 95 ret
000070f8 <mcp2515_readRegisterS>:
70f8: 0f 93 push r16
/*********************************************************************************************************
** Function name: mcp2515_readRegisterS
** Descriptions: Reads sucessive data registers
*********************************************************************************************************/
void mcp2515_readRegisterS(const uint8_t address, uint8_t values[], const uint8_t n)
{
70fa: 1f 93 push r17
70fc: cf 93 push r28
70fe: df 93 push r29
7100: 18 2f mov r17, r24
7102: eb 01 movw r28, r22
uint8_t i;
SPIbeginTransaction(10000000, MSBFIRST, SPI_MODE0);
7104: 04 2f mov r16, r20
7106: d6 df rcall .-84 ; 0x70b4 <SPIbeginTransaction.constprop.1>
MCP2515_SELECT();
7108: 2a 98 cbi 0x05, 2 ; 5
spi_readwrite(MCP_READ);
710a: 83 e0 ldi r24, 0x03 ; 3
710c: cc df rcall .-104 ; 0x70a6 <SPItransfer>
710e: 81 2f mov r24, r17
spi_readwrite(address);
7110: ca df rcall .-108 ; 0x70a6 <SPItransfer>
7112: 0c 0f add r16, r28
7114: 1d 2f mov r17, r29
7116: 11 1d adc r17, r1
7118: c0 17 cp r28, r16
711a: d1 07 cpc r29, r17
// mcp2515 has auto-increment of address-pointer
for (i=0; i<n; i++)
711c: 31 f4 brne .+12 ; 0x712a <mcp2515_readRegisterS+0x32>
711e: 2a 9a sbi 0x05, 2 ; 5
values[i] = spi_read();
MCP2515_UNSELECT();
7120: df 91 pop r29
}
7122: cf 91 pop r28
7124: 1f 91 pop r17
7126: 0f 91 pop r16
7128: 08 95 ret
MCP2515_SELECT();
spi_readwrite(MCP_READ);
spi_readwrite(address);
// mcp2515 has auto-increment of address-pointer
for (i=0; i<n; i++)
values[i] = spi_read();
712a: 80 e0 ldi r24, 0x00 ; 0
712c: bc df rcall .-136 ; 0x70a6 <SPItransfer>
712e: 89 93 st Y+, r24
7130: f3 cf rjmp .-26 ; 0x7118 <mcp2515_readRegisterS+0x20>
00007132 <mcp2515_setRegister>:
/*********************************************************************************************************
** Function name: mcp2515_setRegister
** Descriptions: Sets data register
*********************************************************************************************************/
void mcp2515_setRegister(const uint8_t address, const uint8_t value)
{
7132: cf 93 push r28
7134: df 93 push r29
7136: d8 2f mov r29, r24
SPIbeginTransaction(10000000, MSBFIRST, SPI_MODE0);
7138: c6 2f mov r28, r22
713a: bc df rcall .-136 ; 0x70b4 <SPIbeginTransaction.constprop.1>
MCP2515_SELECT();
713c: 2a 98 cbi 0x05, 2 ; 5
spi_readwrite(MCP_WRITE);
713e: 82 e0 ldi r24, 0x02 ; 2
7140: b2 df rcall .-156 ; 0x70a6 <SPItransfer>
7142: 8d 2f mov r24, r29
spi_readwrite(address);
7144: b0 df rcall .-160 ; 0x70a6 <SPItransfer>
7146: 8c 2f mov r24, r28
7148: ae df rcall .-164 ; 0x70a6 <SPItransfer>
spi_readwrite(value);
714a: 2a 9a sbi 0x05, 2 ; 5
714c: df 91 pop r29
MCP2515_UNSELECT();
}
714e: cf 91 pop r28
7150: 08 95 ret
00007152 <mcp2515_setRegisterS>:
/*********************************************************************************************************
** Function name: mcp2515_setRegisterS
** Descriptions: Sets sucessive data registers
*********************************************************************************************************/
void mcp2515_setRegisterS(const uint8_t address, const uint8_t values[], const uint8_t n)
{
7152: 0f 93 push r16
7154: 1f 93 push r17
7156: cf 93 push r28
7158: df 93 push r29
715a: 18 2f mov r17, r24
715c: eb 01 movw r28, r22
715e: 04 2f mov r16, r20
uint8_t i;
SPIbeginTransaction(10000000, MSBFIRST, SPI_MODE0);
7160: a9 df rcall .-174 ; 0x70b4 <SPIbeginTransaction.constprop.1>
7162: 2a 98 cbi 0x05, 2 ; 5
MCP2515_SELECT();
7164: 82 e0 ldi r24, 0x02 ; 2
spi_readwrite(MCP_WRITE);
7166: 9f df rcall .-194 ; 0x70a6 <SPItransfer>
7168: 81 2f mov r24, r17
spi_readwrite(address);
716a: 9d df rcall .-198 ; 0x70a6 <SPItransfer>
716c: 0c 0f add r16, r28
716e: 1d 2f mov r17, r29
7170: 11 1d adc r17, r1
7172: c0 17 cp r28, r16
7174: d1 07 cpc r29, r17
for (i=0; i<n; i++)
7176: 31 f4 brne .+12 ; 0x7184 <mcp2515_setRegisterS+0x32>
7178: 2a 9a sbi 0x05, 2 ; 5
spi_readwrite(values[i]);
MCP2515_UNSELECT();
717a: df 91 pop r29
}
717c: cf 91 pop r28
717e: 1f 91 pop r17
7180: 0f 91 pop r16
MCP2515_SELECT();
spi_readwrite(MCP_WRITE);
spi_readwrite(address);
for (i=0; i<n; i++)
spi_readwrite(values[i]);
7182: 08 95 ret
7184: 89 91 ld r24, Y+
7186: 8f df rcall .-226 ; 0x70a6 <SPItransfer>
/*********************************************************************************************************
** Function name: mcp2515_modifyRegister
** Descriptions: Sets specific bits of a register
*********************************************************************************************************/
void mcp2515_modifyRegister(const uint8_t address, const uint8_t mask, const uint8_t data)
{
7188: f4 cf rjmp .-24 ; 0x7172 <mcp2515_setRegisterS+0x20>
0000718a <mcp2515_modifyRegister>:
718a: 1f 93 push r17
718c: cf 93 push r28
718e: df 93 push r29
7190: 18 2f mov r17, r24
SPIbeginTransaction(10000000, MSBFIRST, SPI_MODE0);
7192: d6 2f mov r29, r22
MCP2515_SELECT();
spi_readwrite(MCP_BITMOD);
7194: c4 2f mov r28, r20
7196: 8e df rcall .-228 ; 0x70b4 <SPIbeginTransaction.constprop.1>
7198: 2a 98 cbi 0x05, 2 ; 5
spi_readwrite(address);
719a: 85 e0 ldi r24, 0x05 ; 5
719c: 84 df rcall .-248 ; 0x70a6 <SPItransfer>
719e: 81 2f mov r24, r17
spi_readwrite(mask);
71a0: 82 df rcall .-252 ; 0x70a6 <SPItransfer>
71a2: 8d 2f mov r24, r29
spi_readwrite(data);
71a4: 80 df rcall .-256 ; 0x70a6 <SPItransfer>
71a6: 8c 2f mov r24, r28
MCP2515_UNSELECT();
71a8: 7e df rcall .-260 ; 0x70a6 <SPItransfer>
}
71aa: 2a 9a sbi 0x05, 2 ; 5
71ac: df 91 pop r29
71ae: cf 91 pop r28
** Descriptions: Reads status register
*********************************************************************************************************/
uint8_t mcp2515_readStatus(void)
{
uint8_t i;
SPIbeginTransaction(10000000, MSBFIRST, SPI_MODE0);
71b0: 1f 91 pop r17
71b2: 08 95 ret
000071b4 <mcp2515_readStatus>:
MCP2515_SELECT();
spi_readwrite(MCP_READ_STATUS);
71b4: 7f df rcall .-258 ; 0x70b4 <SPIbeginTransaction.constprop.1>
71b6: 2a 98 cbi 0x05, 2 ; 5
71b8: 80 ea ldi r24, 0xA0 ; 160
i = spi_read();
71ba: 75 df rcall .-278 ; 0x70a6 <SPItransfer>
71bc: 80 e0 ldi r24, 0x00 ; 0
71be: 73 df rcall .-282 ; 0x70a6 <SPItransfer>
MCP2515_UNSELECT();
return i;
}
71c0: 2a 9a sbi 0x05, 2 ; 5
/*********************************************************************************************************
** Function name: mcp2515_setCANCTRL_Mode
** Descriptions: Set control mode
*********************************************************************************************************/
uint8_t mcp2515_setCANCTRL_Mode(const uint8_t newmode)
{
71c2: 08 95 ret
000071c4 <mcp2515_setCANCTRL_Mode>:
71c4: cf 93 push r28
71c6: df 93 push r29
uint8_t i;
// 0xF0 0xE0
mcp2515_modifyRegister(MCP_CANCTRL, MODE_MASK, newmode);
71c8: d8 2f mov r29, r24
71ca: 48 2f mov r20, r24
71cc: 60 ee ldi r22, 0xE0 ; 224
71ce: 8f e0 ldi r24, 0x0F ; 15
71d0: dc df rcall .-72 ; 0x718a <mcp2515_modifyRegister>
// 0xF0
i = mcp2515_readRegister(MCP_CANCTRL);
71d2: 8f e0 ldi r24, 0x0F ; 15
71d4: 84 df rcall .-248 ; 0x70de <mcp2515_readRegister>
71d6: c8 2f mov r28, r24
i &= MODE_MASK;
71d8: c0 7e andi r28, 0xE0 ; 224
71da: 8c 2f mov r24, r28
putch (i);
71dc: 5d df rcall .-326 ; 0x7098 <putch>
71de: 81 e0 ldi r24, 0x01 ; 1
71e0: dc 13 cpse r29, r28
if ( i == newmode ) {putch (0x60); return MCP2515_OK; }
return MCP2515_FAIL;
71e2: 03 c0 rjmp .+6 ; 0x71ea <mcp2515_setCANCTRL_Mode+0x26>
mcp2515_modifyRegister(MCP_CANCTRL, MODE_MASK, newmode);
// 0xF0
i = mcp2515_readRegister(MCP_CANCTRL);
i &= MODE_MASK;
putch (i);
if ( i == newmode ) {putch (0x60); return MCP2515_OK; }
71e4: 80 e6 ldi r24, 0x60 ; 96
71e6: 58 df rcall .-336 ; 0x7098 <putch>
71e8: 80 e0 ldi r24, 0x00 ; 0
71ea: df 91 pop r29
71ec: cf 91 pop r28
71ee: 08 95 ret
000071f0 <setMode>:
71f0: 80 93 1e 01 sts 0x011E, r24 ; 0x80011e <mcpMode>
71f4: e7 cf rjmp .-50 ; 0x71c4 <mcp2515_setCANCTRL_Mode>
000071f6 <mcp2515_configRate>:
71f6: 1f 93 push r17
71f8: cf 93 push r28
71fa: df 93 push r29
71fc: e8 2f mov r30, r24
71fe: 86 2f mov r24, r22
7200: 61 30 cpi r22, 0x01 ; 1
7202: 09 f4 brne .+2 ; 0x7206 <mcp2515_configRate+0x10>
7204: 59 c0 rjmp .+178 ; 0x72b8 <mcp2515_configRate+0xc2>
7206: 08 f4 brcc .+2 ; 0x720a <mcp2515_configRate+0x14>
7208: 8e c0 rjmp .+284 ; 0x7326 <mcp2515_configRate+0x130>
720a: 62 30 cpi r22, 0x02 ; 2
720c: 09 f0 breq .+2 ; 0x7210 <mcp2515_configRate+0x1a>
720e: be c0 rjmp .+380 ; 0x738c <mcp2515_configRate+0x196>
7210: e1 50 subi r30, 0x01 ; 1
7212: ee 30 cpi r30, 0x0E ; 14
7214: 08 f0 brcs .+2 ; 0x7218 <mcp2515_configRate+0x22>
7216: ba c0 rjmp .+372 ; 0x738c <mcp2515_configRate+0x196>
7218: f0 e0 ldi r31, 0x00 ; 0
721a: e0 5f subi r30, 0xF0 ; 240
721c: f6 4c sbci r31, 0xC6 ; 198
721e: 4d c4 rjmp .+2202 ; 0x7aba <__tablejump2__>
7220: bb 39 cpi r27, 0x9B ; 155
7222: 1e 39 cpi r17, 0x9E ; 158
7224: 31 39 cpi r19, 0x91 ; 145
7226: 35 39 cpi r19, 0x95 ; 149
7228: 39 39 cpi r19, 0x99 ; 153
722a: 3d 39 cpi r19, 0x9D ; 157
722c: 41 39 cpi r20, 0x91 ; 145
722e: 44 39 cpi r20, 0x94 ; 148
7230: 47 39 cpi r20, 0x97 ; 151
7232: 4b 39 cpi r20, 0x9B ; 155
7234: 4e 39 cpi r20, 0x9E ; 158
7236: 52 39 cpi r21, 0x92 ; 146
7238: 55 39 cpi r21, 0x95 ; 149
723a: 59 39 cpi r21, 0x99 ; 153
723c: c4 e8 ldi r28, 0x84 ; 132
723e: d6 ef ldi r29, 0xF6 ; 246
7240: 13 e9 ldi r17, 0x93 ; 147
7242: 81 e1 ldi r24, 0x11 ; 17
7244: 29 df rcall .-430 ; 0x7098 <putch>
7246: 61 2f mov r22, r17
7248: 8a e2 ldi r24, 0x2A ; 42
724a: 73 df rcall .-282 ; 0x7132 <mcp2515_setRegister>
724c: 6d 2f mov r22, r29
724e: 89 e2 ldi r24, 0x29 ; 41
7250: 70 df rcall .-288 ; 0x7132 <mcp2515_setRegister>
7252: 6c 2f mov r22, r28
7254: 88 e2 ldi r24, 0x28 ; 40
7256: 6d df rcall .-294 ; 0x7132 <mcp2515_setRegister>
7258: 80 e0 ldi r24, 0x00 ; 0
725a: df 91 pop r29
725c: cf 91 pop r28
725e: 1f 91 pop r17
7260: 08 95 ret
7262: c4 e8 ldi r28, 0x84 ; 132
7264: d6 ef ldi r29, 0xF6 ; 246
7266: 19 e8 ldi r17, 0x89 ; 137
7268: ec cf rjmp .-40 ; 0x7242 <mcp2515_configRate+0x4c>
726a: c3 e8 ldi r28, 0x83 ; 131
726c: d5 ee ldi r29, 0xE5 ; 229
726e: 17 e8 ldi r17, 0x87 ; 135
7270: e8 cf rjmp .-48 ; 0x7242 <mcp2515_configRate+0x4c>
7272: c4 e8 ldi r28, 0x84 ; 132
7274: d6 ef ldi r29, 0xF6 ; 246
7276: 15 e8 ldi r17, 0x85 ; 133
7278: e4 cf rjmp .-56 ; 0x7242 <mcp2515_configRate+0x4c>
727a: c4 e8 ldi r28, 0x84 ; 132
727c: d6 ef ldi r29, 0xF6 ; 246
727e: 14 e8 ldi r17, 0x84 ; 132
7280: e0 cf rjmp .-64 ; 0x7242 <mcp2515_configRate+0x4c>
7282: c3 e8 ldi r28, 0x83 ; 131
7284: d5 ee ldi r29, 0xE5 ; 229
7286: fb cf rjmp .-10 ; 0x727e <mcp2515_configRate+0x88>
7288: c1 e8 ldi r28, 0x81 ; 129
728a: d3 ed ldi r29, 0xD3 ; 211
728c: f8 cf rjmp .-16 ; 0x727e <mcp2515_configRate+0x88>
728e: c4 e8 ldi r28, 0x84 ; 132
7290: d6 ef ldi r29, 0xF6 ; 246
7292: 11 e8 ldi r17, 0x81 ; 129
7294: d6 cf rjmp .-84 ; 0x7242 <mcp2515_configRate+0x4c>
7296: c3 e8 ldi r28, 0x83 ; 131
7298: d5 ee ldi r29, 0xE5 ; 229
729a: fb cf rjmp .-10 ; 0x7292 <mcp2515_configRate+0x9c>
729c: c4 e8 ldi r28, 0x84 ; 132
729e: d6 ef ldi r29, 0xF6 ; 246
72a0: 10 e8 ldi r17, 0x80 ; 128
72a2: cf cf rjmp .-98 ; 0x7242 <mcp2515_configRate+0x4c>
72a4: c3 e8 ldi r28, 0x83 ; 131
72a6: d5 ee ldi r29, 0xE5 ; 229
72a8: fb cf rjmp .-10 ; 0x72a0 <mcp2515_configRate+0xaa>
72aa: c1 e8 ldi r28, 0x81 ; 129
72ac: d1 ed ldi r29, 0xD1 ; 209
72ae: 10 e0 ldi r17, 0x00 ; 0
72b0: c8 cf rjmp .-112 ; 0x7242 <mcp2515_configRate+0x4c>
72b2: c0 e8 ldi r28, 0x80 ; 128
72b4: d0 ec ldi r29, 0xC0 ; 192
72b6: fb cf rjmp .-10 ; 0x72ae <mcp2515_configRate+0xb8>
72b8: e1 50 subi r30, 0x01 ; 1
72ba: ee 30 cpi r30, 0x0E ; 14
72bc: 70 f6 brcc .-100 ; 0x725a <mcp2515_configRate+0x64>
72be: f0 e0 ldi r31, 0x00 ; 0
72c0: ed 59 subi r30, 0x9D ; 157
72c2: f6 4c sbci r31, 0xC6 ; 198
72c4: fa c3 rjmp .+2036 ; 0x7aba <__tablejump2__>
72c6: bf 39 cpi r27, 0x9F ; 159
72c8: 71 39 cpi r23, 0x91 ; 145
72ca: 75 39 cpi r23, 0x95 ; 149
72cc: 2d 39 cpi r18, 0x9D ; 157
72ce: 79 39 cpi r23, 0x99 ; 153
72d0: aa 39 cpi r26, 0x9A ; 154
72d2: 7d 39 cpi r23, 0x9D ; 157
72d4: a7 39 cpi r26, 0x97 ; 151
72d6: 80 39 cpi r24, 0x90 ; 144
72d8: 84 39 cpi r24, 0x94 ; 148
72da: c3 39 cpi r28, 0x93 ; 147
72dc: 88 39 cpi r24, 0x98 ; 152
72de: 8c 39 cpi r24, 0x9C ; 156
72e0: 90 39 cpi r25, 0x90 ; 144
72e2: c4 e8 ldi r28, 0x84 ; 132
72e4: d6 ef ldi r29, 0xF6 ; 246
72e6: 17 e6 ldi r17, 0x67 ; 103
72e8: ac cf rjmp .-168 ; 0x7242 <mcp2515_configRate+0x4c>
72ea: c4 e8 ldi r28, 0x84 ; 132
72ec: d6 ef ldi r29, 0xF6 ; 246
72ee: 13 e5 ldi r17, 0x53 ; 83
72f0: a8 cf rjmp .-176 ; 0x7242 <mcp2515_configRate+0x4c>
72f2: c3 e8 ldi r28, 0x83 ; 131
72f4: d5 ee ldi r29, 0xE5 ; 229
72f6: 1e e4 ldi r17, 0x4E ; 78
72f8: a4 cf rjmp .-184 ; 0x7242 <mcp2515_configRate+0x4c>
72fa: c4 e8 ldi r28, 0x84 ; 132
72fc: d6 ef ldi r29, 0xF6 ; 246
72fe: a1 cf rjmp .-190 ; 0x7242 <mcp2515_configRate+0x4c>
7300: c3 e8 ldi r28, 0x83 ; 131
7302: d5 ee ldi r29, 0xE5 ; 229
7304: 14 e4 ldi r17, 0x44 ; 68
7306: 9d cf rjmp .-198 ; 0x7242 <mcp2515_configRate+0x4c>
7308: c3 e8 ldi r28, 0x83 ; 131
730a: d5 ee ldi r29, 0xE5 ; 229
730c: 13 e4 ldi r17, 0x43 ; 67
730e: 99 cf rjmp .-206 ; 0x7242 <mcp2515_configRate+0x4c>
7310: c3 e8 ldi r28, 0x83 ; 131
7312: d5 ee ldi r29, 0xE5 ; 229
7314: 11 e4 ldi r17, 0x41 ; 65
7316: 95 cf rjmp .-214 ; 0x7242 <mcp2515_configRate+0x4c>
7318: c3 e8 ldi r28, 0x83 ; 131
731a: d5 ee ldi r29, 0xE5 ; 229
731c: 10 e4 ldi r17, 0x40 ; 64
731e: 91 cf rjmp .-222 ; 0x7242 <mcp2515_configRate+0x4c>
7320: c1 e8 ldi r28, 0x81 ; 129
7322: da ec ldi r29, 0xCA ; 202
7324: c4 cf rjmp .-120 ; 0x72ae <mcp2515_configRate+0xb8>
7326: e6 50 subi r30, 0x06 ; 6
7328: e9 30 cpi r30, 0x09 ; 9
732a: 80 f5 brcc .+96 ; 0x738c <mcp2515_configRate+0x196>
732c: f0 e0 ldi r31, 0x00 ; 0
732e: eb 58 subi r30, 0x8B ; 139
7330: f6 4c sbci r31, 0xC6 ; 198
7332: c3 c3 rjmp .+1926 ; 0x7aba <__tablejump2__>
7334: ae 39 cpi r26, 0x9E ; 158
7336: aa 39 cpi r26, 0x9A ; 154
7338: a3 39 cpi r26, 0x93 ; 147
733a: a7 39 cpi r26, 0x97 ; 151
733c: 80 39 cpi r24, 0x90 ; 144
733e: b2 39 cpi r27, 0x92 ; 146
7340: c3 39 cpi r28, 0x93 ; 147
7342: b5 39 cpi r27, 0x95 ; 149
7344: b8 39 cpi r27, 0x98 ; 152
7346: c7 e8 ldi r28, 0x87 ; 135
7348: df ef ldi r29, 0xFF ; 255
734a: 14 ec ldi r17, 0xC4 ; 196
734c: 7a cf rjmp .-268 ; 0x7242 <mcp2515_configRate+0x4c>
734e: c4 e8 ldi r28, 0x84 ; 132
7350: d6 ef ldi r29, 0xF6 ; 246
7352: d8 cf rjmp .-80 ; 0x7304 <mcp2515_configRate+0x10e>
7354: c4 e8 ldi r28, 0x84 ; 132
7356: d6 ef ldi r29, 0xF6 ; 246
7358: 19 e4 ldi r17, 0x49 ; 73
735a: 73 cf rjmp .-282 ; 0x7242 <mcp2515_configRate+0x4c>
735c: c1 e8 ldi r28, 0x81 ; 129
735e: d3 ed ldi r29, 0xD3 ; 211
7360: 18 e1 ldi r17, 0x18 ; 24
7362: 6f cf rjmp .-290 ; 0x7242 <mcp2515_configRate+0x4c>
7364: c1 e8 ldi r28, 0x81 ; 129
7366: d3 ed ldi r29, 0xD3 ; 211
7368: cd cf rjmp .-102 ; 0x7304 <mcp2515_configRate+0x10e>
736a: c4 e8 ldi r28, 0x84 ; 132
736c: d6 ef ldi r29, 0xF6 ; 246
736e: d6 cf rjmp .-84 ; 0x731c <mcp2515_configRate+0x126>
7370: c2 e8 ldi r28, 0x82 ; 130
7372: d9 ed ldi r29, 0xD9 ; 217
7374: 9c cf rjmp .-200 ; 0x72ae <mcp2515_configRate+0xb8>
7376: c4 e8 ldi r28, 0x84 ; 132
7378: d6 ef ldi r29, 0xF6 ; 246
737a: 17 ea ldi r17, 0xA7 ; 167
737c: 62 cf rjmp .-316 ; 0x7242 <mcp2515_configRate+0x4c>
737e: c7 e8 ldi r28, 0x87 ; 135
7380: df ef ldi r29, 0xFF ; 255
7382: 1f e3 ldi r17, 0x3F ; 63
7384: 5e cf rjmp .-324 ; 0x7242 <mcp2515_configRate+0x4c>
7386: c4 e8 ldi r28, 0x84 ; 132
7388: d6 ef ldi r29, 0xF6 ; 246
738a: c4 cf rjmp .-120 ; 0x7314 <mcp2515_configRate+0x11e>
738c: 81 e0 ldi r24, 0x01 ; 1
738e: 65 cf rjmp .-310 ; 0x725a <mcp2515_configRate+0x64>
00007390 <mcp2515_write_id>:
7390: cf 93 push r28
7392: df 93 push r29
7394: 00 d0 rcall .+0 ; 0x7396 <mcp2515_write_id+0x6>
7396: 00 d0 rcall .+0 ; 0x7398 <mcp2515_write_id+0x8>
7398: cd b7 in r28, 0x3d ; 61
739a: de b7 in r29, 0x3e ; 62
739c: 61 30 cpi r22, 0x01 ; 1
739e: 09 f5 brne .+66 ; 0x73e2 <mcp2515_write_id+0x52>
73a0: 2c 83 std Y+4, r18 ; 0x04
73a2: 3b 83 std Y+3, r19 ; 0x03
73a4: 9a 01 movw r18, r20
73a6: 44 27 eor r20, r20
73a8: 55 27 eor r21, r21
73aa: 92 2f mov r25, r18
73ac: 99 0f add r25, r25
73ae: 99 0f add r25, r25
73b0: 99 0f add r25, r25
73b2: 90 7e andi r25, 0xE0 ; 224
73b4: 62 2f mov r22, r18
73b6: 63 70 andi r22, 0x03 ; 3
73b8: 68 60 ori r22, 0x08 ; 8
73ba: 96 2b or r25, r22
73bc: 9a 83 std Y+2, r25 ; 0x02
73be: 75 e0 ldi r23, 0x05 ; 5
73c0: 36 95 lsr r19
73c2: 27 95 ror r18
73c4: 7a 95 dec r23
73c6: e1 f7 brne .-8 ; 0x73c0 <mcp2515_write_id+0x30>
73c8: 29 83 std Y+1, r18 ; 0x01
73ca: 44 e0 ldi r20, 0x04 ; 4
73cc: be 01 movw r22, r28
73ce: 6f 5f subi r22, 0xFF ; 255
73d0: 7f 4f sbci r23, 0xFF ; 255
73d2: bf de rcall .-642 ; 0x7152 <mcp2515_setRegisterS>
73d4: 0f 90 pop r0
73d6: 0f 90 pop r0
73d8: 0f 90 pop r0
73da: 0f 90 pop r0
73dc: df 91 pop r29
73de: cf 91 pop r28
73e0: 08 95 ret
73e2: b9 01 movw r22, r18
73e4: 93 e0 ldi r25, 0x03 ; 3
73e6: 76 95 lsr r23
73e8: 67 95 ror r22
73ea: 9a 95 dec r25
73ec: e1 f7 brne .-8 ; 0x73e6 <mcp2515_write_id+0x56>
73ee: 69 83 std Y+1, r22 ; 0x01
73f0: 22 95 swap r18
73f2: 22 0f add r18, r18
73f4: 20 7e andi r18, 0xE0 ; 224
73f6: 2a 83 std Y+2, r18 ; 0x02
73f8: 1c 82 std Y+4, r1 ; 0x04
73fa: 1b 82 std Y+3, r1 ; 0x03
73fc: e6 cf rjmp .-52 ; 0x73ca <mcp2515_write_id+0x3a>
000073fe <mcp2515_write_mf>:
73fe: cf 92 push r12
7400: df 92 push r13
7402: ef 92 push r14
7404: ff 92 push r15
7406: cf 93 push r28
7408: df 93 push r29
740a: 00 d0 rcall .+0 ; 0x740c <mcp2515_write_mf+0xe>
740c: 00 d0 rcall .+0 ; 0x740e <mcp2515_write_mf+0x10>
740e: cd b7 in r28, 0x3d ; 61
7410: de b7 in r29, 0x3e ; 62
7412: e3 2f mov r30, r19
7414: ff 27 eor r31, r31
7416: 6a 01 movw r12, r20
7418: ee 24 eor r14, r14
741a: ff 24 eor r15, r15
741c: 2c 83 std Y+4, r18 ; 0x04
741e: eb 83 std Y+3, r30 ; 0x03
7420: 9c 2d mov r25, r12
7422: 61 30 cpi r22, 0x01 ; 1
7424: 01 f5 brne .+64 ; 0x7466 <mcp2515_write_mf+0x68>
7426: 99 0f add r25, r25
7428: 99 0f add r25, r25
742a: 99 0f add r25, r25
742c: 90 7e andi r25, 0xE0 ; 224
742e: 2c 2d mov r18, r12
7430: 23 70 andi r18, 0x03 ; 3
7432: 28 60 ori r18, 0x08 ; 8
7434: 92 2b or r25, r18
7436: 9a 83 std Y+2, r25 ; 0x02
7438: a6 01 movw r20, r12
743a: 25 e0 ldi r18, 0x05 ; 5
743c: 56 95 lsr r21
743e: 47 95 ror r20
7440: 2a 95 dec r18
7442: e1 f7 brne .-8 ; 0x743c <mcp2515_write_mf+0x3e>
7444: 49 83 std Y+1, r20 ; 0x01
7446: 44 e0 ldi r20, 0x04 ; 4
7448: be 01 movw r22, r28
744a: 6f 5f subi r22, 0xFF ; 255
744c: 7f 4f sbci r23, 0xFF ; 255
744e: 81 de rcall .-766 ; 0x7152 <mcp2515_setRegisterS>
7450: 0f 90 pop r0
7452: 0f 90 pop r0
7454: 0f 90 pop r0
7456: 0f 90 pop r0
7458: df 91 pop r29
745a: cf 91 pop r28
745c: ff 90 pop r15
745e: ef 90 pop r14
7460: df 90 pop r13
7462: cf 90 pop r12
7464: 08 95 ret
7466: 92 95 swap r25
7468: 99 0f add r25, r25
746a: 90 7e andi r25, 0xE0 ; 224
746c: 9a 83 std Y+2, r25 ; 0x02
746e: a6 01 movw r20, r12
7470: 93 e0 ldi r25, 0x03 ; 3
7472: 56 95 lsr r21
7474: 47 95 ror r20
7476: 9a 95 dec r25
7478: e1 f7 brne .-8 ; 0x7472 <mcp2515_write_mf+0x74>
747a: e4 cf rjmp .-56 ; 0x7444 <mcp2515_write_mf+0x46>
0000747c <mcp2515_initCANBuffers>:
747c: cf 93 push r28
747e: 20 e0 ldi r18, 0x00 ; 0
7480: 30 e0 ldi r19, 0x00 ; 0
7482: a9 01 movw r20, r18
7484: 61 e0 ldi r22, 0x01 ; 1
7486: 80 e2 ldi r24, 0x20 ; 32
7488: ba df rcall .-140 ; 0x73fe <mcp2515_write_mf>
748a: 20 e0 ldi r18, 0x00 ; 0
748c: 30 e0 ldi r19, 0x00 ; 0
748e: a9 01 movw r20, r18
7490: 61 e0 ldi r22, 0x01 ; 1
7492: 84 e2 ldi r24, 0x24 ; 36
7494: b4 df rcall .-152 ; 0x73fe <mcp2515_write_mf>
7496: 20 e0 ldi r18, 0x00 ; 0
7498: 30 e0 ldi r19, 0x00 ; 0
749a: a9 01 movw r20, r18
749c: 61 e0 ldi r22, 0x01 ; 1
749e: 80 e0 ldi r24, 0x00 ; 0
74a0: ae df rcall .-164 ; 0x73fe <mcp2515_write_mf>
74a2: 20 e0 ldi r18, 0x00 ; 0
74a4: 30 e0 ldi r19, 0x00 ; 0
74a6: a9 01 movw r20, r18
74a8: 60 e0 ldi r22, 0x00 ; 0
74aa: 84 e0 ldi r24, 0x04 ; 4
74ac: a8 df rcall .-176 ; 0x73fe <mcp2515_write_mf>
74ae: 20 e0 ldi r18, 0x00 ; 0
74b0: 30 e0 ldi r19, 0x00 ; 0
74b2: a9 01 movw r20, r18
74b4: 61 e0 ldi r22, 0x01 ; 1
74b6: 88 e0 ldi r24, 0x08 ; 8
74b8: a2 df rcall .-188 ; 0x73fe <mcp2515_write_mf>
74ba: 20 e0 ldi r18, 0x00 ; 0
74bc: 30 e0 ldi r19, 0x00 ; 0
74be: a9 01 movw r20, r18
74c0: 60 e0 ldi r22, 0x00 ; 0
74c2: 80 e1 ldi r24, 0x10 ; 16
74c4: 9c df rcall .-200 ; 0x73fe <mcp2515_write_mf>
74c6: 20 e0 ldi r18, 0x00 ; 0
74c8: 30 e0 ldi r19, 0x00 ; 0
74ca: a9 01 movw r20, r18
74cc: 61 e0 ldi r22, 0x01 ; 1
74ce: 84 e1 ldi r24, 0x14 ; 20
74d0: 96 df rcall .-212 ; 0x73fe <mcp2515_write_mf>
74d2: 20 e0 ldi r18, 0x00 ; 0
74d4: 30 e0 ldi r19, 0x00 ; 0
74d6: a9 01 movw r20, r18
74d8: 60 e0 ldi r22, 0x00 ; 0
74da: 88 e1 ldi r24, 0x18 ; 24
74dc: 90 df rcall .-224 ; 0x73fe <mcp2515_write_mf>
74de: c0 e3 ldi r28, 0x30 ; 48
74e0: 60 e0 ldi r22, 0x00 ; 0
74e2: 8c 2f mov r24, r28
74e4: 26 de rcall .-948 ; 0x7132 <mcp2515_setRegister>
74e6: 60 e0 ldi r22, 0x00 ; 0
74e8: 80 e1 ldi r24, 0x10 ; 16
74ea: 8c 0f add r24, r28
74ec: 22 de rcall .-956 ; 0x7132 <mcp2515_setRegister>
74ee: 60 e0 ldi r22, 0x00 ; 0
74f0: 80 e2 ldi r24, 0x20 ; 32
74f2: 8c 0f add r24, r28
74f4: 1e de rcall .-964 ; 0x7132 <mcp2515_setRegister>
74f6: cf 5f subi r28, 0xFF ; 255
74f8: ce 33 cpi r28, 0x3E ; 62
74fa: 91 f7 brne .-28 ; 0x74e0 <mcp2515_initCANBuffers+0x64>
74fc: 60 e0 ldi r22, 0x00 ; 0
74fe: 80 e6 ldi r24, 0x60 ; 96
7500: 18 de rcall .-976 ; 0x7132 <mcp2515_setRegister>
7502: 60 e0 ldi r22, 0x00 ; 0
7504: 80 e7 ldi r24, 0x70 ; 112
7506: cf 91 pop r28
7508: 14 ce rjmp .-984 ; 0x7132 <mcp2515_setRegister>
0000750a <mcp2515_init>:
750a: 0f 93 push r16
750c: 1f 93 push r17
750e: cf 93 push r28
7510: df 93 push r29
7512: d8 2f mov r29, r24
7514: 16 2f mov r17, r22
7516: 04 2f mov r16, r20
7518: d8 dd rcall .-1104 ; 0x70ca <mcp2515_reset>
751a: 80 e4 ldi r24, 0x40 ; 64
751c: 80 93 1e 01 sts 0x011E, r24 ; 0x80011e <mcpMode>
7520: 80 e8 ldi r24, 0x80 ; 128
7522: 50 de rcall .-864 ; 0x71c4 <mcp2515_setCANCTRL_Mode>
7524: c8 2f mov r28, r24
7526: c6 dd rcall .-1140 ; 0x70b4 <SPIbeginTransaction.constprop.1>
7528: 2a 98 cbi 0x05, 2 ; 5
752a: 8c 2f mov r24, r28
752c: bc dd rcall .-1160 ; 0x70a6 <SPItransfer>
752e: 2a 9a sbi 0x05, 2 ; 5
7530: 8d ed ldi r24, 0xDD ; 221
7532: b2 dd rcall .-1180 ; 0x7098 <putch>
7534: 82 e1 ldi r24, 0x12 ; 18
7536: c1 11 cpse r28, r1
7538: 0c c0 rjmp .+24 ; 0x7552 <mcp2515_init+0x48>
753a: 89 e9 ldi r24, 0x99 ; 153
753c: ad dd rcall .-1190 ; 0x7098 <putch>
753e: 8a ea ldi r24, 0xAA ; 170
7540: ab dd rcall .-1194 ; 0x7098 <putch>
7542: 8b eb ldi r24, 0xBB ; 187
7544: a9 dd rcall .-1198 ; 0x7098 <putch>
7546: 60 2f mov r22, r16
7548: 81 2f mov r24, r17
754a: 55 de rcall .-854 ; 0x71f6 <mcp2515_configRate>
754c: 88 23 and r24, r24
754e: 19 f0 breq .+6 ; 0x7556 <mcp2515_init+0x4c>
7550: 83 e1 ldi r24, 0x13 ; 19
7552: a2 dd rcall .-1212 ; 0x7098 <putch>
7554: 26 c0 rjmp .+76 ; 0x75a2 <mcp2515_init+0x98>
7556: 84 e1 ldi r24, 0x14 ; 20
7558: 9f dd rcall .-1218 ; 0x7098 <putch>
755a: 90 df rcall .-224 ; 0x747c <mcp2515_initCANBuffers>
755c: 63 e0 ldi r22, 0x03 ; 3
755e: 8b e2 ldi r24, 0x2B ; 43
7560: e8 dd rcall .-1072 ; 0x7132 <mcp2515_setRegister>
7562: 6c e3 ldi r22, 0x3C ; 60
7564: 8c e0 ldi r24, 0x0C ; 12
7566: e5 dd rcall .-1078 ; 0x7132 <mcp2515_setRegister>
7568: 60 e0 ldi r22, 0x00 ; 0
756a: 8d e0 ldi r24, 0x0D ; 13
756c: e2 dd rcall .-1084 ; 0x7132 <mcp2515_setRegister>
756e: dd 23 and r29, r29
7570: 89 f0 breq .+34 ; 0x7594 <mcp2515_init+0x8a>
7572: d3 30 cpi r29, 0x03 ; 3
7574: a9 f4 brne .+42 ; 0x75a0 <mcp2515_init+0x96>
7576: 44 e6 ldi r20, 0x64 ; 100
7578: 64 e6 ldi r22, 0x64 ; 100
757a: 80 e6 ldi r24, 0x60 ; 96
757c: 06 de rcall .-1012 ; 0x718a <mcp2515_modifyRegister>
757e: 40 e6 ldi r20, 0x60 ; 96
7580: 60 e6 ldi r22, 0x60 ; 96
7582: 80 e7 ldi r24, 0x70 ; 112
7584: 02 de rcall .-1020 ; 0x718a <mcp2515_modifyRegister>
7586: 80 91 1e 01 lds r24, 0x011E ; 0x80011e <mcpMode>
758a: df 91 pop r29
758c: cf 91 pop r28
758e: 1f 91 pop r17
7590: 0f 91 pop r16
7592: 18 ce rjmp .-976 ; 0x71c4 <mcp2515_setCANCTRL_Mode>
7594: 44 e0 ldi r20, 0x04 ; 4
7596: 64 e6 ldi r22, 0x64 ; 100
7598: 80 e6 ldi r24, 0x60 ; 96
759a: f7 dd rcall .-1042 ; 0x718a <mcp2515_modifyRegister>
759c: 40 e0 ldi r20, 0x00 ; 0
759e: f0 cf rjmp .-32 ; 0x7580 <mcp2515_init+0x76>
75a0: c1 e0 ldi r28, 0x01 ; 1
75a2: 8c 2f mov r24, r28
75a4: df 91 pop r29
75a6: cf 91 pop r28
75a8: 1f 91 pop r17
75aa: 0f 91 pop r16
75ac: 08 95 ret
000075ae <mcp2515_read_id>:
75ae: ef 92 push r14
75b0: ff 92 push r15
75b2: 0f 93 push r16
75b4: 1f 93 push r17
75b6: cf 93 push r28
75b8: df 93 push r29
75ba: 00 d0 rcall .+0 ; 0x75bc <mcp2515_read_id+0xe>
75bc: 00 d0 rcall .+0 ; 0x75be <mcp2515_read_id+0x10>
75be: cd b7 in r28, 0x3d ; 61
75c0: de b7 in r29, 0x3e ; 62
75c2: 7b 01 movw r14, r22
75c4: 8a 01 movw r16, r20
75c6: fb 01 movw r30, r22
75c8: 10 82 st Z, r1
75ca: fa 01 movw r30, r20
75cc: 10 82 st Z, r1
75ce: 11 82 std Z+1, r1 ; 0x01
75d0: 12 82 std Z+2, r1 ; 0x02
75d2: 13 82 std Z+3, r1 ; 0x03
75d4: 44 e0 ldi r20, 0x04 ; 4
75d6: be 01 movw r22, r28
75d8: 6f 5f subi r22, 0xFF ; 255
75da: 7f 4f sbci r23, 0xFF ; 255
75dc: 8d dd rcall .-1254 ; 0x70f8 <mcp2515_readRegisterS>
75de: 2a 81 ldd r18, Y+2 ; 0x02
75e0: 89 81 ldd r24, Y+1 ; 0x01
75e2: f8 e0 ldi r31, 0x08 ; 8
75e4: 8f 9f mul r24, r31
75e6: a0 01 movw r20, r0
75e8: 11 24 eor r1, r1
75ea: 82 2f mov r24, r18
75ec: 82 95 swap r24
75ee: 86 95 lsr r24
75f0: 87 70 andi r24, 0x07 ; 7
75f2: 84 0f add r24, r20
75f4: 95 2f mov r25, r21
75f6: 91 1d adc r25, r1
75f8: 09 2e mov r0, r25
75fa: 00 0c add r0, r0
75fc: aa 0b sbc r26, r26
75fe: bb 0b sbc r27, r27
7600: f8 01 movw r30, r16
7602: 80 83 st Z, r24
7604: 91 83 std Z+1, r25 ; 0x01
7606: a2 83 std Z+2, r26 ; 0x02
7608: b3 83 std Z+3, r27 ; 0x03
760a: 23 ff sbrs r18, 3
760c: 25 c0 rjmp .+74 ; 0x7658 <mcp2515_read_id+0xaa>
760e: 32 e0 ldi r19, 0x02 ; 2
7610: 88 0f add r24, r24
7612: 99 1f adc r25, r25
7614: aa 1f adc r26, r26
7616: bb 1f adc r27, r27
7618: 3a 95 dec r19
761a: d1 f7 brne .-12 ; 0x7610 <mcp2515_read_id+0x62>
761c: 23 70 andi r18, 0x03 ; 3
761e: 82 0f add r24, r18
7620: 91 1d adc r25, r1
7622: a1 1d adc r26, r1
7624: b1 1d adc r27, r1
7626: ba 2f mov r27, r26
7628: a9 2f mov r26, r25
762a: 98 2f mov r25, r24
762c: 88 27 eor r24, r24
762e: 2b 81 ldd r18, Y+3 ; 0x03
7630: 82 0f add r24, r18
7632: 91 1d adc r25, r1
7634: a1 1d adc r26, r1
7636: b1 1d adc r27, r1
7638: ba 2f mov r27, r26
763a: a9 2f mov r26, r25
763c: 98 2f mov r25, r24
763e: 88 27 eor r24, r24
7640: 2c 81 ldd r18, Y+4 ; 0x04
7642: 82 0f add r24, r18
7644: 91 1d adc r25, r1
7646: a1 1d adc r26, r1
7648: b1 1d adc r27, r1
764a: 80 83 st Z, r24
764c: 91 83 std Z+1, r25 ; 0x01
764e: a2 83 std Z+2, r26 ; 0x02
7650: b3 83 std Z+3, r27 ; 0x03
7652: 81 e0 ldi r24, 0x01 ; 1
7654: f7 01 movw r30, r14
7656: 80 83 st Z, r24
7658: 0f 90 pop r0
765a: 0f 90 pop r0
765c: 0f 90 pop r0
765e: 0f 90 pop r0
7660: df 91 pop r29
7662: cf 91 pop r28
7664: 1f 91 pop r17
7666: 0f 91 pop r16
7668: ff 90 pop r15
766a: ef 90 pop r14
766c: 08 95 ret
0000766e <mcp2515_write_canMsg>:
766e: cf 93 push r28
7670: c8 2f mov r28, r24
7672: 40 91 22 01 lds r20, 0x0122 ; 0x800122 <m_nDlc>
7676: 66 e1 ldi r22, 0x16 ; 22
7678: 71 e0 ldi r23, 0x01 ; 1
767a: 85 e0 ldi r24, 0x05 ; 5
767c: 8c 0f add r24, r28
767e: 69 dd rcall .-1326 ; 0x7152 <mcp2515_setRegisterS>
7680: 80 91 10 01 lds r24, 0x0110 ; 0x800110 <m_nRtr>
7684: 81 30 cpi r24, 0x01 ; 1
7686: 29 f4 brne .+10 ; 0x7692 <mcp2515_write_canMsg+0x24>
7688: 80 91 22 01 lds r24, 0x0122 ; 0x800122 <m_nDlc>
768c: 80 64 ori r24, 0x40 ; 64
768e: 80 93 22 01 sts 0x0122, r24 ; 0x800122 <m_nDlc>
7692: 60 91 22 01 lds r22, 0x0122 ; 0x800122 <m_nDlc>
7696: 84 e0 ldi r24, 0x04 ; 4
7698: 8c 0f add r24, r28
769a: 4b dd rcall .-1386 ; 0x7132 <mcp2515_setRegister>
769c: 20 91 11 01 lds r18, 0x0111 ; 0x800111 <m_nID>
76a0: 30 91 12 01 lds r19, 0x0112 ; 0x800112 <m_nID+0x1>
76a4: 40 91 13 01 lds r20, 0x0113 ; 0x800113 <m_nID+0x2>
76a8: 50 91 14 01 lds r21, 0x0114 ; 0x800114 <m_nID+0x3>
76ac: 60 91 1f 01 lds r22, 0x011F ; 0x80011f <m_nExtFlg>
76b0: 8c 2f mov r24, r28
76b2: cf 91 pop r28
76b4: 6d ce rjmp .-806 ; 0x7390 <mcp2515_write_id>
000076b6 <mcp2515_read_canMsg>:
76b6: cf 93 push r28
76b8: df 93 push r29
76ba: c8 2f mov r28, r24
76bc: 41 e1 ldi r20, 0x11 ; 17
76be: 51 e0 ldi r21, 0x01 ; 1
76c0: 6f e1 ldi r22, 0x1F ; 31
76c2: 71 e0 ldi r23, 0x01 ; 1
76c4: 74 df rcall .-280 ; 0x75ae <mcp2515_read_id>
76c6: 8f ef ldi r24, 0xFF ; 255
76c8: 8c 0f add r24, r28
76ca: 09 dd rcall .-1518 ; 0x70de <mcp2515_readRegister>
76cc: d8 2f mov r29, r24
76ce: 84 e0 ldi r24, 0x04 ; 4
76d0: 8c 0f add r24, r28
76d2: 05 dd rcall .-1526 ; 0x70de <mcp2515_readRegister>
76d4: d3 ff sbrs r29, 3
76d6: 0e c0 rjmp .+28 ; 0x76f4 <mcp2515_read_canMsg+0x3e>
76d8: 91 e0 ldi r25, 0x01 ; 1
76da: 90 93 10 01 sts 0x0110, r25 ; 0x800110 <m_nRtr>
76de: 48 2f mov r20, r24
76e0: 4f 70 andi r20, 0x0F ; 15
76e2: 40 93 22 01 sts 0x0122, r20 ; 0x800122 <m_nDlc>
76e6: 66 e1 ldi r22, 0x16 ; 22
76e8: 71 e0 ldi r23, 0x01 ; 1
76ea: 85 e0 ldi r24, 0x05 ; 5
76ec: 8c 0f add r24, r28
76ee: df 91 pop r29
76f0: cf 91 pop r28
76f2: 02 cd rjmp .-1532 ; 0x70f8 <mcp2515_readRegisterS>
76f4: 10 92 10 01 sts 0x0110, r1 ; 0x800110 <m_nRtr>
76f8: f2 cf rjmp .-28 ; 0x76de <mcp2515_read_canMsg+0x28>
000076fa <mcp2515_getNextFreeTXBuf>:
76fa: af 92 push r10
76fc: bf 92 push r11
76fe: cf 92 push r12
7700: df 92 push r13
7702: ef 92 push r14
7704: ff 92 push r15
7706: 1f 93 push r17
7708: cf 93 push r28
770a: df 93 push r29
770c: 00 d0 rcall .+0 ; 0x770e <mcp2515_getNextFreeTXBuf+0x14>
770e: 1f 92 push r1
7710: cd b7 in r28, 0x3d ; 61
7712: de b7 in r29, 0x3e ; 62
7714: 6c 01 movw r12, r24
7716: 80 91 08 01 lds r24, 0x0108 ; 0x800108 <__data_start+0x8>
771a: 90 91 09 01 lds r25, 0x0109 ; 0x800109 <__data_start+0x9>
771e: a0 91 0a 01 lds r26, 0x010A ; 0x80010a <__data_start+0xa>
7722: 89 83 std Y+1, r24 ; 0x01
7724: 9a 83 std Y+2, r25 ; 0x02
7726: ab 83 std Y+3, r26 ; 0x03
7728: f6 01 movw r30, r12
772a: 10 82 st Z, r1
772c: ce 01 movw r24, r28
772e: 01 96 adiw r24, 0x01 ; 1
7730: 7c 01 movw r14, r24
7732: 5e 01 movw r10, r28
7734: 94 e0 ldi r25, 0x04 ; 4
7736: a9 0e add r10, r25
7738: b1 1c adc r11, r1
773a: f7 01 movw r30, r14
773c: 11 91 ld r17, Z+
773e: 7f 01 movw r14, r30
7740: 81 2f mov r24, r17
7742: cd dc rcall .-1638 ; 0x70de <mcp2515_readRegister>
7744: 83 fd sbrc r24, 3
7746: 11 c0 rjmp .+34 ; 0x776a <mcp2515_getNextFreeTXBuf+0x70>
7748: 1f 5f subi r17, 0xFF ; 255
774a: f6 01 movw r30, r12
774c: 10 83 st Z, r17
774e: 80 e0 ldi r24, 0x00 ; 0
7750: 0f 90 pop r0
7752: 0f 90 pop r0
7754: 0f 90 pop r0
7756: df 91 pop r29
7758: cf 91 pop r28
775a: 1f 91 pop r17
775c: ff 90 pop r15
775e: ef 90 pop r14
7760: df 90 pop r13
7762: cf 90 pop r12
7764: bf 90 pop r11
7766: af 90 pop r10
7768: 08 95 ret
776a: ea 14 cp r14, r10
776c: fb 04 cpc r15, r11
776e: 29 f7 brne .-54 ; 0x773a <mcp2515_getNextFreeTXBuf+0x40>
7770: 82 e0 ldi r24, 0x02 ; 2
7772: ee cf rjmp .-36 ; 0x7750 <mcp2515_getNextFreeTXBuf+0x56>
00007774 <MCP_CAN>:
7774: 80 93 0e 01 sts 0x010E, r24 ; 0x80010e <__data_end>
7778: 2a 9a sbi 0x05, 2 ; 5
777a: 22 9a sbi 0x04, 2 ; 4
777c: 08 95 ret
0000777e <mcp2515_begin>:
777e: 2f b7 in r18, 0x3f ; 63
7780: f8 94 cli
7782: 90 91 15 01 lds r25, 0x0115 ; 0x800115 <initialized>
7786: 91 11 cpse r25, r1
7788: 0b c0 rjmp .+22 ; 0x77a0 <mcp2515_begin+0x22>
778a: 22 9b sbis 0x04, 2 ; 4
778c: 2a 9a sbi 0x05, 2 ; 5
778e: 22 9a sbi 0x04, 2 ; 4
7790: 9c b5 in r25, 0x2c ; 44
7792: 90 61 ori r25, 0x10 ; 16
7794: 9c bd out 0x2c, r25 ; 44
7796: 9c b5 in r25, 0x2c ; 44
7798: 90 64 ori r25, 0x40 ; 64
779a: 9c bd out 0x2c, r25 ; 44
779c: 25 9a sbi 0x04, 5 ; 4
779e: 23 9a sbi 0x04, 3 ; 4
77a0: 90 91 15 01 lds r25, 0x0115 ; 0x800115 <initialized>
77a4: 9f 5f subi r25, 0xFF ; 255
77a6: 90 93 15 01 sts 0x0115, r25 ; 0x800115 <initialized>
77aa: 2f bf out 0x3f, r18 ; 63
77ac: ae de rcall .-676 ; 0x750a <mcp2515_init>
77ae: 91 e0 ldi r25, 0x01 ; 1
77b0: 81 11 cpse r24, r1
77b2: 01 c0 rjmp .+2 ; 0x77b6 <mcp2515_begin+0x38>
77b4: 90 e0 ldi r25, 0x00 ; 0
77b6: 89 2f mov r24, r25
77b8: 08 95 ret
000077ba <init_Mask>:
77ba: cf 92 push r12
77bc: df 92 push r13
77be: ef 92 push r14
77c0: ff 92 push r15
77c2: cf 93 push r28
77c4: df 93 push r29
77c6: d8 2f mov r29, r24
77c8: c6 2f mov r28, r22
77ca: 69 01 movw r12, r18
77cc: 7a 01 movw r14, r20
77ce: 80 e8 ldi r24, 0x80 ; 128
77d0: f9 dc rcall .-1550 ; 0x71c4 <mcp2515_setCANCTRL_Mode>
77d2: 81 11 cpse r24, r1
77d4: 17 c0 rjmp .+46 ; 0x7804 <init_Mask+0x4a>
77d6: d1 11 cpse r29, r1
77d8: 0e c0 rjmp .+28 ; 0x77f6 <init_Mask+0x3c>
77da: a7 01 movw r20, r14
77dc: 96 01 movw r18, r12
77de: 6c 2f mov r22, r28
77e0: 80 e2 ldi r24, 0x20 ; 32
77e2: 0d de rcall .-998 ; 0x73fe <mcp2515_write_mf>
77e4: 80 91 1e 01 lds r24, 0x011E ; 0x80011e <mcpMode>
77e8: df 91 pop r29
77ea: cf 91 pop r28
77ec: ff 90 pop r15
77ee: ef 90 pop r14
77f0: df 90 pop r13
77f2: cf 90 pop r12
77f4: e7 cc rjmp .-1586 ; 0x71c4 <mcp2515_setCANCTRL_Mode>
77f6: d1 30 cpi r29, 0x01 ; 1
77f8: a9 f7 brne .-22 ; 0x77e4 <init_Mask+0x2a>
77fa: a7 01 movw r20, r14
77fc: 96 01 movw r18, r12
77fe: 6c 2f mov r22, r28
7800: 84 e2 ldi r24, 0x24 ; 36
7802: ef cf rjmp .-34 ; 0x77e2 <init_Mask+0x28>
7804: df 91 pop r29
7806: cf 91 pop r28
7808: ff 90 pop r15
780a: ef 90 pop r14
780c: df 90 pop r13
780e: cf 90 pop r12
7810: 08 95 ret
00007812 <init_Filt>:
7812: cf 92 push r12
7814: df 92 push r13
7816: ef 92 push r14
7818: ff 92 push r15
781a: cf 93 push r28
781c: df 93 push r29
781e: c8 2f mov r28, r24
7820: d6 2f mov r29, r22
7822: 69 01 movw r12, r18
7824: 7a 01 movw r14, r20
7826: 80 e8 ldi r24, 0x80 ; 128
7828: cd dc rcall .-1638 ; 0x71c4 <mcp2515_setCANCTRL_Mode>
782a: 81 11 cpse r24, r1
782c: 34 c0 rjmp .+104 ; 0x7896 <init_Filt+0x84>
782e: c2 30 cpi r28, 0x02 ; 2
7830: 19 f1 breq .+70 ; 0x7878 <init_Filt+0x66>
7832: 68 f4 brcc .+26 ; 0x784e <init_Filt+0x3c>
7834: cc 23 and r28, r28
7836: a9 f0 breq .+42 ; 0x7862 <init_Filt+0x50>
7838: c1 30 cpi r28, 0x01 ; 1
783a: c9 f0 breq .+50 ; 0x786e <init_Filt+0x5c>
783c: 80 91 1e 01 lds r24, 0x011E ; 0x80011e <mcpMode>
7840: df 91 pop r29
7842: cf 91 pop r28
7844: ff 90 pop r15
7846: ef 90 pop r14
7848: df 90 pop r13
784a: cf 90 pop r12
784c: bb cc rjmp .-1674 ; 0x71c4 <mcp2515_setCANCTRL_Mode>
784e: c4 30 cpi r28, 0x04 ; 4
7850: e9 f0 breq .+58 ; 0x788c <init_Filt+0x7a>
7852: b8 f0 brcs .+46 ; 0x7882 <init_Filt+0x70>
7854: c5 30 cpi r28, 0x05 ; 5
7856: 91 f7 brne .-28 ; 0x783c <init_Filt+0x2a>
7858: a7 01 movw r20, r14
785a: 96 01 movw r18, r12
785c: 6d 2f mov r22, r29
785e: 88 e1 ldi r24, 0x18 ; 24
7860: 04 c0 rjmp .+8 ; 0x786a <init_Filt+0x58>
7862: a7 01 movw r20, r14
7864: 96 01 movw r18, r12
7866: 6d 2f mov r22, r29
7868: 80 e0 ldi r24, 0x00 ; 0
786a: c9 dd rcall .-1134 ; 0x73fe <mcp2515_write_mf>
786c: e7 cf rjmp .-50 ; 0x783c <init_Filt+0x2a>
786e: a7 01 movw r20, r14
7870: 96 01 movw r18, r12
7872: 6d 2f mov r22, r29
7874: 84 e0 ldi r24, 0x04 ; 4
7876: f9 cf rjmp .-14 ; 0x786a <init_Filt+0x58>
7878: a7 01 movw r20, r14
787a: 96 01 movw r18, r12
787c: 6d 2f mov r22, r29
787e: 88 e0 ldi r24, 0x08 ; 8
7880: f4 cf rjmp .-24 ; 0x786a <init_Filt+0x58>
7882: a7 01 movw r20, r14
7884: 96 01 movw r18, r12
7886: 6d 2f mov r22, r29
7888: 80 e1 ldi r24, 0x10 ; 16
788a: ef cf rjmp .-34 ; 0x786a <init_Filt+0x58>
788c: a7 01 movw r20, r14
788e: 96 01 movw r18, r12
7890: 6d 2f mov r22, r29
7892: 84 e1 ldi r24, 0x14 ; 20
7894: ea cf rjmp .-44 ; 0x786a <init_Filt+0x58>
7896: df 91 pop r29
7898: cf 91 pop r28
789a: ff 90 pop r15
789c: ef 90 pop r14
789e: df 90 pop r13
78a0: cf 90 pop r12
78a2: 08 95 ret
000078a4 <setMsg>:
78a4: ef 92 push r14
78a6: ff 92 push r15
78a8: 0f 93 push r16
78aa: 60 93 11 01 sts 0x0111, r22 ; 0x800111 <m_nID>
78ae: 70 93 12 01 sts 0x0112, r23 ; 0x800112 <m_nID+0x1>
78b2: 80 93 13 01 sts 0x0113, r24 ; 0x800113 <m_nID+0x2>
78b6: 90 93 14 01 sts 0x0114, r25 ; 0x800114 <m_nID+0x3>
78ba: 40 93 10 01 sts 0x0110, r20 ; 0x800110 <m_nRtr>
78be: 20 93 1f 01 sts 0x011F, r18 ; 0x80011f <m_nExtFlg>
78c2: 00 93 22 01 sts 0x0122, r16 ; 0x800122 <m_nDlc>
78c6: f7 01 movw r30, r14
78c8: a6 e1 ldi r26, 0x16 ; 22
78ca: b1 e0 ldi r27, 0x01 ; 1
78cc: c7 01 movw r24, r14
78ce: 08 96 adiw r24, 0x08 ; 8
78d0: 21 91 ld r18, Z+
78d2: 2d 93 st X+, r18
78d4: e8 17 cp r30, r24
78d6: f9 07 cpc r31, r25
78d8: d9 f7 brne .-10 ; 0x78d0 <setMsg+0x2c>
78da: 80 e0 ldi r24, 0x00 ; 0
78dc: 0f 91 pop r16
78de: ff 90 pop r15
78e0: ef 90 pop r14
78e2: 08 95 ret
000078e4 <clearMsg>:
78e4: 10 92 11 01 sts 0x0111, r1 ; 0x800111 <m_nID>
78e8: 10 92 12 01 sts 0x0112, r1 ; 0x800112 <m_nID+0x1>
78ec: 10 92 13 01 sts 0x0113, r1 ; 0x800113 <m_nID+0x2>
78f0: 10 92 14 01 sts 0x0114, r1 ; 0x800114 <m_nID+0x3>
78f4: 10 92 22 01 sts 0x0122, r1 ; 0x800122 <m_nDlc>
78f8: 10 92 1f 01 sts 0x011F, r1 ; 0x80011f <m_nExtFlg>
78fc: 10 92 10 01 sts 0x0110, r1 ; 0x800110 <m_nRtr>
7900: 10 92 21 01 sts 0x0121, r1 ; 0x800121 <m_nfilhit>
7904: 80 e0 ldi r24, 0x00 ; 0
7906: 08 95 ret
00007908 <sendMsg>:
7908: 0f 93 push r16
790a: 1f 93 push r17
790c: cf 93 push r28
790e: df 93 push r29
7910: 1f 92 push r1
7912: cd b7 in r28, 0x3d ; 61
7914: de b7 in r29, 0x3e ; 62
7916: 10 e0 ldi r17, 0x00 ; 0
7918: 00 e0 ldi r16, 0x00 ; 0
791a: ce 01 movw r24, r28
791c: 01 96 adiw r24, 0x01 ; 1
791e: ed de rcall .-550 ; 0x76fa <mcp2515_getNextFreeTXBuf>
7920: 0f 5f subi r16, 0xFF ; 255
7922: 1f 4f sbci r17, 0xFF ; 255
7924: 82 30 cpi r24, 0x02 ; 2
7926: 29 f4 brne .+10 ; 0x7932 <sendMsg+0x2a>
7928: 04 36 cpi r16, 0x64 ; 100
792a: 11 05 cpc r17, r1
792c: b1 f7 brne .-20 ; 0x791a <sendMsg+0x12>
792e: 96 e0 ldi r25, 0x06 ; 6
7930: 1d c0 rjmp .+58 ; 0x796c <sendMsg+0x64>
7932: 04 36 cpi r16, 0x64 ; 100
7934: 11 05 cpc r17, r1
7936: d9 f3 breq .-10 ; 0x792e <sendMsg+0x26>
7938: 89 81 ldd r24, Y+1 ; 0x01
793a: 99 de rcall .-718 ; 0x766e <mcp2515_write_canMsg>
793c: 89 81 ldd r24, Y+1 ; 0x01
793e: 48 e0 ldi r20, 0x08 ; 8
7940: 68 e0 ldi r22, 0x08 ; 8
7942: 81 50 subi r24, 0x01 ; 1
7944: 22 dc rcall .-1980 ; 0x718a <mcp2515_modifyRegister>
7946: 10 e0 ldi r17, 0x00 ; 0
7948: 00 e0 ldi r16, 0x00 ; 0
794a: 0f 5f subi r16, 0xFF ; 255
794c: 1f 4f sbci r17, 0xFF ; 255
794e: 89 81 ldd r24, Y+1 ; 0x01
7950: 81 50 subi r24, 0x01 ; 1
7952: c5 db rcall .-2166 ; 0x70de <mcp2515_readRegister>
7954: 98 2f mov r25, r24
7956: 98 70 andi r25, 0x08 ; 8
7958: 83 ff sbrs r24, 3
795a: 05 c0 rjmp .+10 ; 0x7966 <sendMsg+0x5e>
795c: 04 36 cpi r16, 0x64 ; 100
795e: 11 05 cpc r17, r1
7960: a1 f7 brne .-24 ; 0x794a <sendMsg+0x42>
7962: 97 e0 ldi r25, 0x07 ; 7
7964: 03 c0 rjmp .+6 ; 0x796c <sendMsg+0x64>
7966: 04 36 cpi r16, 0x64 ; 100
7968: 11 05 cpc r17, r1
796a: d9 f3 breq .-10 ; 0x7962 <sendMsg+0x5a>
796c: 89 2f mov r24, r25
796e: 0f 90 pop r0
7970: df 91 pop r29
7972: cf 91 pop r28
7974: 1f 91 pop r17
7976: 0f 91 pop r16
7978: 08 95 ret
0000797a <sendMsgBuf>:
797a: ef 92 push r14
797c: ff 92 push r15
797e: 0f 93 push r16
7980: 1f 93 push r17
7982: 78 01 movw r14, r16
7984: 02 2f mov r16, r18
7986: 24 2f mov r18, r20
7988: 40 e0 ldi r20, 0x00 ; 0
798a: 8c df rcall .-232 ; 0x78a4 <setMsg>
798c: 1f 91 pop r17
798e: 0f 91 pop r16
7990: ff 90 pop r15
7992: ef 90 pop r14
7994: b9 cf rjmp .-142 ; 0x7908 <sendMsg>
7ac4: 09 94 ijmp
Странно что компилятор подсовывает разные шапки.
Makefile опубликуй от второго варианта ?
makefile
# Makefile for ATmegaBOOT
# E.Lins, 18.7.2005
# $Id$
#
# Instructions
#
# To make bootloader .hex file:
# make diecimila
# make lilypad
# make ng
# etc...
#
# To burn bootloader .hex file:
# make diecimila_isp
# make lilypad_isp
# make ng_isp
# etc...
#
# Edit History
# 201406xx: WestfW: More Makefile restructuring.
# Split off Makefile.1284, Makefile.extras, Makefile.custom
# So that in theory, the main Makefile contains only the
# official platforms, and does not need to be modified to
# add "less supported" chips and boards.
# 201303xx: WestfW: Major Makefile restructuring.
# Allows options on Make command line "make xx LED=B3"
# (see also pin_defs.h)
# Divide into "chip" targets and "board" targets.
# Most boards are (recursive) board targets with options.
# Move isp target to separate makefile (fixes m8 EFUSE)
# Some (many) targets will now be rebuilt when not
# strictly necessary, so that options will be included.
# (any "make" with options will always compile.)
# Set many variables with ?= so they can be overridden
# Use arduinoISP settings as default for ISP targets
#
#
# * Copyright 2013-2015 by Bill Westfield. Part of Optiboot.
# * This software is licensed under version 2 of the Gnu Public Licence.
# * See optiboot.c for details.
HELPTEXT = "\n"
#----------------------------------------------------------------------
#
# program name should not be changed...
PROGRAM = optiboot
# The default behavior is to build using tools that are in the users
# current path variables, but we can also build using an installed
# Arduino user IDE setup, or the Arduino source tree.
# Uncomment this next lines to build within the arduino environment,
# using the arduino-included avrgcc toolset (mac and pc)
# ENV ?= arduino
# ENV ?= arduinodev
# OS ?= macosx
# OS ?= windows
# export symbols to recursive makes (for ISP)
export
# defaults
MCU_TARGET = atmega168
LDSECTIONS = -Wl,--section-start=.text=0x3e00 -Wl,--section-start=.version=0x3ffe
# Build environments
# Start of some ugly makefile-isms to allow optiboot to be built
# in several different environments. See the README.TXT file for
# details.
# default
fixpath = $(1)
SH := bash
ifeq ($(ENV), arduino)
# For Arduino, we assume that we're connected to the optiboot directory
# included with the arduino distribution, which means that the full set
# of avr-tools are "right up there" in standard places.
# (except that in 1.5.x, there's an additional level of "up")
TESTDIR := $(firstword $(wildcard ../../../tools/*))
ifeq (,$(TESTDIR))
# Arduino 1.5.x tool location compared to optiboot dir
TOOLROOT = ../../../../tools
else
# Arduino 1.0 (and earlier) tool location
TOOLROOT = ../../../tools
endif
GCCROOT = $(TOOLROOT)/avr/bin/
ifeq ($(OS), windows)
# On windows, SOME of the tool paths will need to have backslashes instead
# of forward slashes (because they use windows cmd.exe for execution instead
# of a unix/mingw shell?) We also have to ensure that a consistent shell
# is used even if a unix shell is installed (ie as part of WINAVR)
fixpath = $(subst /,\,$1)
SHELL = cmd.exe
SH = sh
endif
else ifeq ($(ENV), arduinodev)
# Arduino IDE source code environment. Use the unpacked compilers created
# by the build (you'll need to do "ant build" first.)
ifeq ($(OS), macosx)
TOOLROOT = ../../../../build/macosx/work/Arduino.app/Contents/Resources/Java/hardware/tools
endif
ifeq ($(OS), windows)
TOOLROOT = ../../../../build/windows/work/hardware/tools
endif
GCCROOT = $(TOOLROOT)/avr/bin/
AVRDUDE_CONF = -C$(TOOLROOT)/avr/etc/avrdude.conf
else
GCCROOT =
AVRDUDE_CONF =
endif
STK500 = "C:\Program Files\Atmel\AVR Tools\STK500\Stk500.exe"
STK500-1 = $(STK500) -e -d$(MCU_TARGET) -pf -vf -if$(PROGRAM)_$(TARGET).hex \
-lFF -LFF -f$(HFUSE)$(LFUSE) -EF8 -ms -q -cUSB -I200kHz -s -wt
STK500-2 = $(STK500) -d$(MCU_TARGET) -ms -q -lCF -LCF -cUSB -I200kHz -s -wt
#
# End of build environment code.
OBJ = $(PROGRAM).o
OPTIMIZE = -Os -fno-split-wide-types -mrelax
DEFS =
CC = $(GCCROOT)avr-gcc
# Override is only needed by avr-lib build system.
HELPTEXT += "Option AVR_FREQ=<n> - Clock rate of AVR CPU\n"
override CFLAGS = -g -Wall $(OPTIMIZE) -mmcu=$(MCU_TARGET) -DF_CPU=$(AVR_FREQ) $(DEFS)
override LDFLAGS = $(LDSECTIONS) -Wl,--relax -nostartfiles
OBJCOPY = $(GCCROOT)avr-objcopy
OBJDUMP = $(call fixpath,$(GCCROOT)avr-objdump)
SIZE = $(GCCROOT)avr-size
#
# Make command-line Options.
# Permit commands like "make atmega328 LED_START_FLASHES=10" to pass the
# appropriate parameters ("-DLED_START_FLASHES=10") to gcc
#
ifdef PRODUCTION
ifneq ($(PRODUCTION),0)
VERSION_CMD = -DPRODUCTION=1
endif
dummy = FORCE
endif
HELPTEXT += "Option CUSTOM_VERSION=nn - set a customer version number\n"
ifdef CUSTOM_VERSION
ifneq ($(CUSTOM_VERSION), 0)
VERSION_CMD = -DOPTIBOOT_CUSTOMVER=$(CUSTOM_VERSION)
else
VERSION_CMD = -DPRODUCTION=1
endif
dummy = FORCE
endif
HELPTEXT += "Option BAUD_RATE=nnnn - set the bit rate for communications\n"
ifdef BAUD_RATE
BAUD_RATE_CMD = -DBAUD_RATE=$(BAUD_RATE)
dummy = FORCE
else
BAUD_RATE_CMD = -DBAUD_RATE=115200
endif
HELPTEXT += "Option LED=B3 - set LED pin to particular port/bit\n"
ifdef LED
LED_CMD = -DLED=$(LED)
dummy = FORCE
endif
HELPTEXT += "Option LED_START_FLASHES=n - set number of LED flashes when bootloader starts\n"
ifdef LED_START_FLASHES
LED_START_FLASHES_CMD = -DLED_START_FLASHES=$(LED_START_FLASHES)
dummy = FORCE
else
LED_START_FLASHES_CMD = -DLED_START_FLASHES=3
endif
HELPTEXT += "Option LED_DATA_FLASH=1 - flash the LED each time data is received.\n"
ifdef LED_DATA_FLASH
ifneq ($(LED_DATA_FLASH), 0)
LED_DATA_FLASH_CMD = -DLED_DATA_FLASH=1
dummy = FORCE
endif
endif
HELPTEXT += "Option LED_START_ON=1 - Turn the LED on at bootload start\n"
ifdef LED_START_ON
ifneq ($(LED_START_ON), 0)
LED_START_ON_CMD = -DLED_START_ON=1
endif
dummy = FORCE
endif
HELPTEXT += "Option RS485=PIN - Turn the RS485 on at bootload start\n"
ifdef RS485
ifneq ($(RS485), 0)
RS485_CMD = -DRS485=$(RS485)
endif
dummy = FORCE
endif
HELPTEXT += "Option BIGBOOT=1 - enable extra features up to 1kbytes\n"
# BIGBOOT: Include extra features, up to 1K.
ifdef BIGBOOT
ifneq ($(BIGBOOT), 0)
BIGBOOT_CMD = -DBIGBOOT=1
dummy = FORCE
endif
endif
HELPTEXT += "Option SUPPORT_EEPROM=1 - Include code to read/write EEPROM\n"
ifdef SUPPORT_EEPROM
ifneq ($(SUPPORT_EEPROM), 0)
SUPPORT_EEPROM_CMD = -DSUPPORT_EEPROM
dummy = FORCE
endif
endif
HELPTEXT += "Option SOFT_UART=1 - use a software (bit-banged) UART\n"
ifdef SOFT_UART
ifneq ($(SOFT_UART), 0)
SOFT_UART_CMD = -DSOFT_UART=1
dummy = FORCE
endif
endif
HELPTEXT += "Option SINGLESPEED=1 - do not use U2X mode on UART\n"
ifdef SINGLESPEED
ifneq ($(SINGLESPEED), 0)
SS_CMD = -DSINGLESPEED=1
endif
endif
HELPTEXT += "Option NO_APP_SPM=1 - disallow application call of do_spm\n"
ifdef NO_APP_SPM
ifneq ($(NO_APP_SPM),0)
APPSPM_CMD = -DAPP_NOSPM=1
endif
endif
COMMON_OPTIONS = $(BAUD_RATE_CMD) $(LED_START_FLASHES_CMD) $(BIGBOOT_CMD)
COMMON_OPTIONS += $(SOFT_UART_CMD) $(LED_DATA_FLASH_CMD) $(LED_CMD) $(SS_CMD)
COMMON_OPTIONS += $(SUPPORT_EEPROM_CMD) $(LED_START_ON_CMD) $(APPSPM_CMD)
COMMON_OPTIONS += $(VERSION_CMD)
COMMON_OPTIONS += $(RS485_CMD)
#UART is handled separately and only passed for devices with more than one.
HELPTEXT += "Option UART=n - use UARTn for communications\n"
ifdef UART
UART_CMD = -DUART=$(UART)
endif
# Not supported yet
# ifdef TIMEOUT_MS
# TIMEOUT_MS_CMD = -DTIMEOUT_MS=$(TIMEOUT_MS)
# dummy = FORCE
# endif
#
#.PRECIOUS: %.elf
#---------------------------------------------------------------------------
# "Chip-level Platform" targets.
# A "Chip-level Platform" compiles for a particular chip, but probably does
# not have "standard" values for things like clock speed, LED pin, etc.
# Makes for chip-level platforms should usually explicitly define their
# options like: "make atmega1285 AVR_FREQ=16000000L LED=D0"
#---------------------------------------------------------------------------
#
# Note about fuses:
# the efuse should really be 0xf8; since, however, only the lower
# three bits of that byte are used on the atmega168, avrdude gets
# confused if you specify 1's for the higher bits, see:
# http://tinker.it/now/2007/02/24/the-tale-of-avrdude-atmega168-and-extended-bits-fuses/
#
# similarly, the lock bits should be 0xff instead of 0x3f (to
# unlock the bootloader section) and 0xcf instead of 0x2f (to
# lock it), but since the high two bits of the lock byte are
# unused, avrdude would get confused.
#---------------------------------------------------------------------------
#
HELPTEXT += "\n-------------\n\n"
# Test platforms
# Virtual boot block test
HELPTEXT += "target virboot8 - ATmega8 with virtual boot partition\n"
virboot8: TARGET = atmega8
virboot8: MCU_TARGET = atmega8
virboot8: CFLAGS += $(COMMON_OPTIONS) '-DVIRTUAL_BOOT_PARTITION' '-Dsave_vect_num=EE_RDY_vect_num'
virboot8: AVR_FREQ ?= 16000000L
# Start address of 1D80 allows for size up to 640 bytes, app up to 7552
virboot8: LDSECTIONS = -Wl,--section-start=.text=0x1d80 -Wl,--section-start=.version=0x1ffe
virboot8: $(PROGRAM)_virboot8.hex
ifndef PRODUCTION
virboot8: $(PROGRAM)_virboot8.lst
endif
HELPTEXT += "target virboot328p - ATmega328 with virtual boot partition\n"
virboot328: TARGET = atmega328
virboot328: MCU_TARGET = atmega328p
virboot328: CFLAGS += $(COMMON_OPTIONS) '-DVIRTUAL_BOOT_PARTITION'
virboot328: AVR_FREQ ?= 8000000L
virboot328: LDSECTIONS = -Wl,--section-start=.text=0x7d80 -Wl,--section-start=.version=0x7ffe
virboot328: $(PROGRAM)_virboot328.hex
ifndef PRODUCTION
virboot328: $(PROGRAM)_virboot328.lst
endif
virboot328_isp: virboot328
virboot328_isp: TARGET = virboot328
virboot328_isp: MCU_TARGET = atmega328p
# no boot section, SPIEN
virboot328_isp: HFUSE ?= DF
# Low power xtal (16MHz) 16KCK/14CK+65ms
virboot328_isp: LFUSE ?= FF
# 2.7V brownout
virboot328_isp: EFUSE ?= FD
virboot328_isp: isp
virboot8_isp: virboot8
virboot8_isp: TARGET = virboot8
virboot8_isp: MCU_TARGET = atmega8
# SPIEN, CKOPT (for full swing xtal), boot section 1k
# Note that we need boot section to include our SPM instructions,
# even though we do not enable BOOTRST
virboot8_isp: HFUSE ?= CB
# 2.7V brownout, 16MHz Xtal, 16KCK/14CK+65ms
virboot8_isp: LFUSE ?= BF
virboot8_isp: isp
# Diecimila, Duemilanove with m168, and NG use identical bootloaders
# Call it "atmega168" for generality and clarity, keep "diecimila" for
# backward compatibility of makefile
# ATmega8
#
HELPTEXT += "target atmega8 - ATmega8, ATmega8A, ATmega8L\n"
atmega8: TARGET = atmega8
atmega8: MCU_TARGET = atmega8
atmega8: CFLAGS += $(COMMON_OPTIONS)
atmega8: AVR_FREQ ?= 16000000L
ifndef BIGBOOT
atmega8: LDSECTIONS = -Wl,--section-start=.text=0x1e00 -Wl,--section-start=.version=0x1ffe -Wl,--gc-sections -Wl,--undefined=optiboot_version
else
atmega8: LDSECTIONS = -Wl,--section-start=.text=0x1c00 -Wl,--section-start=.version=0x1ffe -Wl,--gc-sections -Wl,--undefined=optiboot_version
endif
atmega8: $(PROGRAM)_atmega8.hex
ifndef PRODUCTION
atmega8: $(PROGRAM)_atmega8.lst
endif
atmega8_isp: atmega8
atmega8_isp: TARGET = atmega8
atmega8_isp: MCU_TARGET = atmega8
ifndef BIGBOOT
# SPIEN, CKOPT (for full swing xtal), Bootsize=512B
atmega8_isp: HFUSE ?= CC
else
# SPIEN, CKOPT (for full swing xtal), Bootsize=1024B
atmega8_isp: HFUSE ?= CA
endif
# 2.7V brownout, 16MHz Xtal, 16KCK/14CK+65ms
atmega8_isp: LFUSE ?= BF
atmega8_isp: isp
HELPTEXT += "target atmega168* - ATmega168/A, ATmega168P, ATMEGA1268PB\n"
atmega168: TARGET = atmega168
atmega168: MCU_TARGET = atmega168
atmega168: CFLAGS += $(COMMON_OPTIONS)
atmega168: AVR_FREQ ?= 16000000L
ifndef BIGBOOT
atmega168: LDSECTIONS = -Wl,--section-start=.text=0x3e00 -Wl,--section-start=.version=0x3ffe
else
atmega168: LDSECTIONS = -Wl,--section-start=.text=0x3c00 -Wl,--section-start=.version=0x3ffe
endif
atmega168: $(PROGRAM)_atmega168.hex
ifndef PRODUCTION
atmega168: $(PROGRAM)_atmega168.lst
endif
atmega168_isp: atmega168
atmega168_isp: TARGET = atmega168
# 2.7V brownout
atmega168_isp: HFUSE ?= DD
# Full swing (16MHz) 16KCK/14CK+65ms
atmega168_isp: LFUSE ?= F7
ifndef BIGBOOT
# 512 byte boot
atmega168_isp: EFUSE ?= FC
else
# 1024byte boot
atmega168_isp: EFUSE ?= FA
endif
atmega168_isp: isp
HELPTEXT += "target atmega328* - ATmega328, ATmega328p, ATmega328pb\n"
atmega328: TARGET = atmega328
atmega328: MCU_TARGET = atmega328p
atmega328: CFLAGS += $(COMMON_OPTIONS)
atmega328: AVR_FREQ ?= 16000000L
ifndef BIGBOOT
atmega328: LDSECTIONS = -Wl,--section-start=.text=0x7e00 -Wl,--section-start=.version=0x7ffe
else
# bigboot version is 2k long; starts earlier
atmega328: LDSECTIONS = -Wl,--section-start=.text=0x7000 -Wl,--section-start=.version=0x7ffe
endif
atmega328: $(PROGRAM)_atmega328.hex
ifndef PRODUCTION
atmega328: $(PROGRAM)_atmega328.lst
endif
atmega328_isp: atmega328
atmega328_isp: TARGET = atmega328
atmega328_isp: MCU_TARGET = atmega328p
ifndef BIGBOOT
# 512 byte boot, SPIEN
atmega328_isp: HFUSE ?= DE
else
# 1k byte boot, SPIEN
atmega328_isp: HFUSE ?= DC
endif
# Low power xtal (16MHz) 16KCK/14CK+65ms
atmega328_isp: LFUSE ?= FF
# 2.7V brownout
atmega328_isp: EFUSE ?= FD
atmega328_isp: isp
#Atmega1280
HELPTEXT += "target atmega1280 - ATmega1280 (100pin, 128k)\n"
atmega1280: MCU_TARGET = atmega1280
atmega1280: CFLAGS += $(COMMON_OPTIONS) -DBIGBOOT $(UART_CMD)
atmega1280: AVR_FREQ ?= 16000000L
atmega1280: LDSECTIONS = -Wl,--section-start=.text=0x1fc00 -Wl,--section-start=.version=0x1fffe
atmega1280: $(PROGRAM)_atmega1280.hex
ifndef PRODUCTION
atmega1280: $(PROGRAM)_atmega1280.lst
endif
#---------------------------------------------------------------------------
# "Board-level Platform" targets.
# A "Board-level Platform" implies a manufactured platform with a particular
# AVR_FREQ, LED, and so on. Parameters are not particularly changable from
# the "make" command line.
# Most of the board-level platform builds should envoke make recursively
# appropriate specific options
#---------------------------------------------------------------------------
# 20MHz clocked platforms
#
# These are capable of 230400 baud, or 115200 baud on PC (Arduino Avrdude issue)
#
pro20: TARGET = pro_20mhz
pro20: CHIP = atmega168
pro20:
"$(MAKE)" atmega168 AVR_FREQ=20000000L LED_START_FLASHES=3
mv $(PROGRAM)_$(CHIP).hex $(PROGRAM)_$(TARGET).hex
ifndef PRODUCTION
mv $(PROGRAM)_$(CHIP).lst $(PROGRAM)_$(TARGET).lst
endif
pro20_isp: pro20
pro20_isp: TARGET = pro_20mhz
# 4.3V brownout (for max speed!)
pro20_isp: HFUSE ?= DC
# Full swing xtal (20MHz) 258CK/14CK+4.1ms
pro20_isp: LFUSE ?= F7
# 512 byte boot
pro20_isp: EFUSE ?= FC
pro20_isp: isp
# 16MHz clocked platforms
#
# These are capable of 230400 baud, or 115200 baud on PC (Arduino Avrdude issue)
#
pro16: TARGET = pro_16MHz
pro16: CHIP = atmega168
pro16:
"$(MAKE)" $(CHIP) AVR_FREQ=16000000L LED_START_FLASHES=3
mv $(PROGRAM)_$(CHIP).hex $(PROGRAM)_$(TARGET).hex
ifndef PRODUCTION
mv $(PROGRAM)_$(CHIP).lst $(PROGRAM)_$(TARGET).lst
endif
pro16_isp: pro16
pro16_isp: TARGET = pro_16MHz
# 2.7V brownout
pro16_isp: HFUSE ?= DD
# Full swing xtal (20MHz) 258CK/14CK+4.1ms
pro16_isp: LFUSE ?= F7
# 512 byte boot
pro16_isp: EFUSE ?= FC
pro16_isp: isp
diecimila: TARGET = diecimila
diecimila: CHIP = atmega168
diecimila:
"$(MAKE)" $(CHIP) AVR_FREQ=16000000L LED_START_FLASHES=3
mv $(PROGRAM)_$(CHIP).hex $(PROGRAM)_$(TARGET).hex
ifndef PRODUCTION
mv $(PROGRAM)_$(CHIP).lst $(PROGRAM)_$(TARGET).lst
endif
diecimila_isp: diecimila
diecimila_isp: TARGET = diecimila
# 2.7V brownout
diecimila_isp: HFUSE ?= DD
# Low power xtal (16MHz) 16KCK/14CK+65ms
diecimila_isp: LFUSE ?= F7
# 512 byte boot
diecimila_isp: EFUSE ?= FC
diecimila_isp: isp
# MEGA1280 Board (this is different from the atmega1280 chip platform)
# Mega has a minimum boot size of 1024 bytes, so enable extra functions
# Note that optiboot does not (can not) work on the MEGA2560
#mega: TARGET = atmega1280
mega1280: atmega1280
mega1280_isp: mega1280
mega1280_isp: TARGET = atmega1280
mega1280_isp: MCU_TARGET = atmega1280
# 1024 byte boot
mega1280_isp: HFUSE ?= DE
# Low power xtal (16MHz) 16KCK/14CK+65ms
mega1280_isp: LFUSE ?= FF
# 2.7V brownout; wants F5 for some reason...
mega1280_isp: EFUSE ?= F5
mega1280_isp: isp
# 8MHz clocked platforms
#
# These are capable of 115200 baud
# Note that "new" Arduinos with an AVR as USB/Serial converter will NOT work
# with an 8MHz target Arduino. The bitrate errors are in opposite directions,
# and total too large a number.
#
lilypad: TARGET = $@
lilypad: CHIP = atmega168
lilypad:
"$(MAKE)" $(CHIP) AVR_FREQ=8000000L LED_START_FLASHES=3
mv $(PROGRAM)_$(CHIP).hex $(PROGRAM)_$(TARGET).hex
ifndef PRODUCTION
mv $(PROGRAM)_$(CHIP).lst $(PROGRAM)_$(TARGET).lst
endif
lilypad_isp: lilypad
lilypad_isp: TARGET = lilypad
# 2.7V brownout
lilypad_isp: HFUSE ?= DD
# Internal 8MHz osc (8MHz) Slow rising power
lilypad_isp: LFUSE ?= E2
# 512 byte boot
lilypad_isp: EFUSE ?= FC
lilypad_isp: isp
# lilypad_resonator is the same as a 8MHz lilypad, except for fuses.
lilypad_resonator: lilypad
lilypad_resonator_isp: lilypad
lilypad_resonator_isp: TARGET = lilypad
# 2.7V brownout
lilypad_resonator_isp: HFUSE ?= DD
# Full swing xtal (20MHz) 258CK/14CK+4.1ms
lilypad_resonator_isp: LFUSE ?= C6
# 512 byte boot
lilypad_resonator_isp: EFUSE ?= FC
lilypad_resonator_isp: isp
pro8: TARGET = pro_8MHz
pro8: CHIP = atmega168
pro8:
"$(MAKE)" $(CHIP) AVR_FREQ=8000000L LED_START_FLASHES=3
mv $(PROGRAM)_$(CHIP).hex $(PROGRAM)_$(TARGET).hex
ifndef PRODUCTION
mv $(PROGRAM)_$(CHIP).lst $(PROGRAM)_$(TARGET).lst
endif
pro8_isp: pro8
pro8_isp: TARGET = pro_8MHz
# 2.7V brownout
pro8_isp: HFUSE ?= DD
# Full swing xtal (20MHz) 258CK/14CK+4.1ms
pro8_isp: LFUSE ?= C6
# 512 byte boot
pro8_isp: EFUSE ?= FC
pro8_isp: isp
atmega328_pro8: TARGET = atmega328_pro_8MHz
atmega328_pro8: CHIP = atmega328
atmega328_pro8:
"$(MAKE)" $(CHIP) AVR_FREQ=8000000L LED_START_FLASHES=3
mv $(PROGRAM)_$(CHIP).hex $(PROGRAM)_$(TARGET).hex
ifndef PRODUCTION
mv $(PROGRAM)_$(CHIP).lst $(PROGRAM)_$(TARGET).lst
endif
atmega328_pro8_isp: atmega328_pro8
atmega328_pro8_isp: TARGET = atmega328_pro_8MHz
atmega328_pro8_isp: MCU_TARGET = atmega328p
# 512 byte boot, SPIEN
atmega328_pro8_isp: HFUSE ?= DE
# Low power xtal (16MHz) 16KCK/14CK+65ms
atmega328_pro8_isp: LFUSE ?= FF
# 2.7V brownout
atmega328_pro8_isp: EFUSE ?= FD
atmega328_pro8_isp: isp
#
# Include additional platforms
include Makefile.atmel
include Makefile.extras
include Makefile.1284
include Makefile.custom
include Makefile.2560
include Makefile.tiny
include Makefile.MCUdude
BAUDCHECK=
ifndef PRODUCTION
ifndef SOFT_UART
BAUDCHECK= baudcheck
endif
endif
#---------------------------------------------------------------------------
#
# Generic build instructions
#
FORCE:
baudcheck: FORCE
- @$(CC) --version
- @$(CC) $(CFLAGS) -E baudcheck.c -o baudcheck.tmp.sh
- @$(SH) baudcheck.tmp.sh
isp: $(TARGET)
"$(MAKE)" -f Makefile.isp isp TARGET=$(TARGET)
isp-stk500: $(PROGRAM)_$(TARGET).hex
$(STK500-1)
$(STK500-2)
%.elf: $(OBJ) $(BAUDCHECK) $(dummy)
$(CC) $(CFLAGS) $(LDFLAGS) -o $@ $< $(LIBS)
$(SIZE) $@
#windows "rm" is dumb and objects to wildcards that don't exist
clean:
@touch __temp_.o __temp_.elf __temp_.lst __temp_.map
@touch __temp_.sym __temp_.lss __temp_.eep __temp_.srec
@touch __temp_.bin __temp_.hex __temp_.tmp.sh
rm -rf *.o *.elf *.lst *.map *.sym *.lss *.eep *.srec *.bin *.hex *.tmp.sh
clean_asm:
rm -rf *.lst
%.lst: %.elf
$(OBJDUMP) -h -S $< > $@
%.hex: %.elf
$(OBJCOPY) -j .text -j .data -j .version --set-section-flags .version=alloc,load -O ihex $< $@
%.srec: %.elf
$(OBJCOPY) -j .text -j .data -j .version --set-section-flags .version=alloc,load -O srec $< $@
%.bin: %.elf
$(OBJCOPY) -j .text -j .data -j .version --set-section-flags .version=alloc,load -O binary $< $@
help:
@echo -e $(HELPTEXT)
Это какой то отдельный каталог со своими исходниками ардуино или через основную папку ide собирается ?
собирается через папку оптибут , но я долго тоже с этим морочился . Там надо от ide 1.5.6 кое что в свежую иде переписывать в папку utils иначе не работает . Позже закину готовую ide уже с настроенным этим всем.
Я так сделал очистку регистра нуля и инит стека - до main(), это правильно будет ?
int main(void) __attribute__ ((OS_main)) __attribute__ ((section (".init9")));
void putch(uint8_t);
int zero_r1(void) __attribute__ ((section (".init2")));
int zero_r1(void)
{
__asm__ __volatile__ (
"eor r1, r1\n"
"out 0x3f, r1\n"
"ldi r28, 0xFF\n"
"ldi r29, 0x08\n"
"out 0x3e, r29\n"
"out 0x3d, r28\n"
);
return 0;
}
int main(void)
{
бла бла
листинг такой
Disassembly of section .text:
00007000 <zero_r1>:
int zero_r1(void) __attribute__ ((section (".init2")));
int zero_r1(void)
{
__asm__ __volatile__ (
7000: 11 24 eor r1, r1
7002: 1f be out 0x3f, r1 ; 63
7004: cf ef ldi r28, 0xFF ; 255
7006: d8 e0 ldi r29, 0x08 ; 8
7008: de bf out 0x3e, r29 ; 62
700a: cd bf out 0x3d, r28 ; 61
"ldi r29, 0x08\n"
"out 0x3e, r29\n"
"out 0x3d, r28\n"
);
return 0;
}
700c: 90 e0 ldi r25, 0x00 ; 0
700e: 80 e0 ldi r24, 0x00 ; 0
7010: 08 95 ret
00007012 <__do_copy_data>:
7012: 11 e0 ldi r17, 0x01 ; 1
7014: a0 e0 ldi r26, 0x00 ; 0
7016: b1 e0 ldi r27, 0x01 ; 1
7018: e4 e9 ldi r30, 0x94 ; 148
701a: fa e7 ldi r31, 0x7A ; 122
701c: 02 c0 rjmp .+4 ; 0x7022 <__do_copy_data+0x10>
701e: 05 90 lpm r0, Z+
7020: 0d 92 st X+, r0
7022: ae 30 cpi r26, 0x0E ; 14
7024: b1 07 cpc r27, r17
7026: d9 f7 brne .-10 ; 0x701e <__do_copy_data+0xc>
00007028 <__do_clear_bss>:
7028: 21 e0 ldi r18, 0x01 ; 1
702a: ae e0 ldi r26, 0x0E ; 14
702c: b1 e0 ldi r27, 0x01 ; 1
702e: 01 c0 rjmp .+2 ; 0x7032 <.do_clear_bss_start>
00007030 <.do_clear_bss_loop>:
7030: 1d 92 st X+, r1
00007032 <.do_clear_bss_start>:
7032: a3 32 cpi r26, 0x23 ; 35
7034: b2 07 cpc r27, r18
7036: e1 f7 brne .-8 ; 0x7030 <.do_clear_bss_loop>
00007038 <main>:
int main(void)
{
UCSR0A = _BV(U2X0); //Double speed mode USART0
7038: 82 e0 ldi r24, 0x02 ; 2
703a: 80 93 c0 00 sts 0x00C0, r24 ; 0x8000c0 <__DATA_REGION_ORIGIN__+0x60>
UCSR0B = _BV(RXEN0) | _BV(TXEN0);
703e: 88 e1 ldi r24, 0x18 ; 24
там батник my по адресу
C:\бла бла \Desktop\arduino-1.8.19\hardware\arduino\avr\bootloaders\optibootRS
этот адрес вбиваем в командуную строку от имени админа
и далее команду
my atmega328 BIGBOOT=1
проект там по-моему в архиве еще не CAN, а только RS485
В стеке нет адреса возврата - скорее всего шагнет на адрес 0000
Надо добавить атрибут noreturn и убрать return 0
1 лайк
Тут правильнее загружать в регистры не магичесаие цифры, а конкретные значения - lo(RAMEND) и hi(RAMEND).
Да , я об этом подумал. Чтобы на мк с другим объемом рам код тоже правильно компилировался.
Я сначала на си код написал который в младший и старший регистры SP пишет максимальный адрес (из константы RAMEND.) Наверное на си и оставлю , потому что по листингу тоже самое получается, если не получится это на асм сделать.
так на асме всегда так было
ldi R16, low(RAMEND)
out SPL, R16
ldi R16, high(RAMEND)
out SPH, R16
или это не оно?
Да , должно быть оно.
не получилось с атрибутом noreturn , все равно в конце функции ret вставлялся , делал функцию и void и int без return 0 , все одно .
хотел уже костылем сделать , перепрыгивая команду ret командой rjmp .+2
Так бы работало?
получил такой листинг.
Disassembly of section .text:
00007000 <zero_r1_stackinit>:
inline void zero_r1_stackinit(void) __attribute__ ((section (".init2")));
void zero_r1_stackinit(void)
{
__asm__ __volatile__ (
7000: 11 24 eor r1, r1
7002: 1f be out 0x3f, r1 ; 63
"eor r1, r1\n"
"out 0x3f, r1\n"
);
uint8_t low = RAMEND;
uint8_t high = (RAMEND & 0xFF00)>>8;
SPL = low;
7004: 8f ef ldi r24, 0xFF ; 255
7006: 8d bf out 0x3d, r24 ; 61
SPH = high;
7008: 88 e0 ldi r24, 0x08 ; 8
700a: 8e bf out 0x3e, r24 ; 62
// "ldi r29, lo(RAMEND)\n"
// "out SPL, r29\n"
// "out SPH, r28\n"
//);
__asm__ __volatile__ (
700c: 01 c0 rjmp .+2 ; 0x7010 <__do_copy_data>
"rjmp .+2\n"
);
}
700e: 08 95 ret
00007010 <__do_copy_data>:
7010: 11 e0 ldi r17, 0x01 ; 1
7012: a0 e0 ldi r26, 0x00 ; 0
7014: b1 e0 ldi r27, 0x01 ; 1
но по итогу почитал, подошел для этого атрибут attribute((naked))
с ним получается почти как из IDE листинг.
только компиляция из IDE делает инит стека в секции __ctors_end . у меня не получилось туда этот код загнать. Ну и фиг с ним. секция .init2 , (куда я сделал) вроде как раз и предназначена для инита стека и обнуления регистров.
по итогу получилось так
int main(void) __attribute__ ((OS_main)) __attribute__ ((section (".init9")));
void zero_r1_stackinit(void) __attribute__((naked)) __attribute__ ((section (".init2")));
void zero_r1_stackinit(void)
{
__asm__ __volatile__ (
"eor r1, r1\n"
"out 0x3f, r1\n"
);
uint8_t low = (RAMEND & 0xFF);
uint8_t high = (RAMEND & 0xFF00)>>8;
SPL = low;
SPH = high;
//__asm__ __volatile__ (
// "eor r1, r1\n"
// "out 0x3f, r1\n"
// "ldi r28, hi(RAMEND)\n"
// "ldi r29, lo(RAMEND)\n"
// "out SPL, r29\n"
// "out SPH, r28\n"
//);
//__asm__ __volatile__ (
// "rjmp .+2\n"
//);
}
int main(void)
{
бла бла
и листинг
Disassembly of section .text:
00007000 <zero_r1_stackinit>:
void zero_r1_stackinit(void) __attribute__((naked)) __attribute__ ((section (".init2")));
void zero_r1_stackinit(void)
{
__asm__ __volatile__ (
7000: 11 24 eor r1, r1
7002: 1f be out 0x3f, r1 ; 63
"eor r1, r1\n"
"out 0x3f, r1\n"
);
uint8_t low = (RAMEND & 0xFF);
uint8_t high = (RAMEND & 0xFF00)>>8;
SPL = low;
7004: 8f ef ldi r24, 0xFF ; 255
7006: 8d bf out 0x3d, r24 ; 61
SPH = high;
7008: 88 e0 ldi r24, 0x08 ; 8
700a: 8e bf out 0x3e, r24 ; 62
0000700c <__do_copy_data>:
700c: 11 e0 ldi r17, 0x01 ; 1
700e: a0 e0 ldi r26, 0x00 ; 0
7010: b1 e0 ldi r27, 0x01 ; 1
7012: ee e8 ldi r30, 0x8E ; 142
7014: fa e7 ldi r31, 0x7A ; 122
7016: 02 c0 rjmp .+4 ; 0x701c <__do_copy_data+0x10>
7018: 05 90 lpm r0, Z+
701a: 0d 92 st X+, r0
701c: ae 30 cpi r26, 0x0E ; 14
701e: b1 07 cpc r27, r17
7020: d9 f7 brne .-10 ; 0x7018 <__do_copy_data+0xc>
00007022 <__do_clear_bss>:
7022: 21 e0 ldi r18, 0x01 ; 1
7024: ae e0 ldi r26, 0x0E ; 14
7026: b1 e0 ldi r27, 0x01 ; 1
7028: 01 c0 rjmp .+2 ; 0x702c <.do_clear_bss_start>
0000702a <.do_clear_bss_loop>:
702a: 1d 92 st X+, r1
0000702c <.do_clear_bss_start>:
702c: a3 32 cpi r26, 0x23 ; 35
702e: b2 07 cpc r27, r18
7030: e1 f7 brne .-8 ; 0x702a <.do_clear_bss_loop>
00007032 <main>:
}
int main(void)
{
UCSR0A = _BV(U2X0); //Double speed mode USART0
7032: 82 e0 ldi r24, 0x02 ; 2
7034: 80 93 c0 00 sts 0x00C0
бла бла
и да, кстати ниже ассемблерные строчки не компилируются, оставил сишный код, все равно по листингу в тоже самое превращается
"ldi r28, hi(RAMEND)\n"
"ldi r29, lo(RAMEND)\n"
hi и lo пишутся в чистом ассемблере
В inline ассемблере надо писать higih и low - их же C компилятор анализирует…
все равно никак не получается, разные варианты попробовал, тем более RAMEND во вставке он тоже не понимает . да и хрен с ним .
такой код меня вполне устраивает
void zero_r1_stackinit(void) __attribute__((naked)) __attribute__ ((section (".init2")));
void zero_r1_stackinit(void)
{
asm volatile ("clr __zero_reg__");
SREG=0;
SP=RAMEND;
}
1 лайк
по итогу получилось добиться рабочей версии загрузчика по CAN .
но напишу пожалуй в эту тему.
очень долго в процессе мучался, на пути постоянно встречались какие то проблемы.
вот эту искал очень долго
я за основу взял код загрузчика оптибут 6.2. зачем-то в этом оптибуте на этапе, когда начинается запись страницы памяти во флеш (ну то есть сначала записи буфера в ОЗУ на это место). байты страницы, прилетающие от загрузчика STK500 с компа, пишутся cначала в ОЗУ в буфер, но странным образом! В штатном оптибуте запись в ОЗУ буфера делается вот так :
#define buff ((uint8_t*)(RAMSTART))
{
//бла бла и вот интересующее нас место:
uint8_t *bufPtr;
bufPtr = buff;
do *bufPtr++ = getch(); while (--length);
// бла бла
writebuffer(desttype, buff, address, savelength); // процедура записи страницы из буфера во флеш
}
то есть сначала кучи (я правильно понимаю?). получается там ничего штатный оптибут не хранил. А когда я добавил код CAN, на этом месте стали лежать переменные (куча сдвинулась в бОльший адрес? ) и эти данные, используемые CAN , благополучно затирались при начале записи страницы флеш. И работала запись только одной страницы и далее CAN отсыхал. Искал проблему очень долго . По итогу, если писать код не в загрузчике, а в основной программе - можно найти адрес начала свободного места в ОЗУ для буфера записи страницы флеш так:
uint8_t *address_freeRAM;
#define buff ((uint8_t*)(address_freeRAM))
{
//бла бла и вот интересующее нас место:
uint8_t *bufPtr;
address_freeRAM = (byte *) malloc(1); // определяем адрес начала свободной памяти RAM (адрес конца кучи)
bufPtr = buff;
free (address_freeRAM);
do *bufPtr++ = getch(); while (--length);
// бла бла
writebuffer(desttype, buff, address, savelength); // процедура записи страницы из буфера во флеш
}
но это блин не компилируется в загрузчике. при использовании malloc он пишет
undefined refernce to __heap_end
как мне это исправить, может кто подскажет ?
или может выйти из ситуации можно по другому ?
я пока временно решил таким образом
#define buff ((uint8_t*)(RAMSTART+0x100))
сорян , вопрос снимается. решил проблему просто объявив локальный массив
{
uint8_t *bufPtr;
uint8_t buff[SPM_PAGESIZE+3];
bufPtr = buff;
do *bufPtr++ = getch(); while (--length);
//бла бла
writebuffer(desttype, buff, address, savelength); // процедура записи страницы из буфера во флеш
}
я точно помню несколько раз пробовал так делать, когда боролся с проблемой . не работало. Причем пробовал и локальный массив и статический и глобальный . не получалось. Может глаз замылился тогда и что-то еще мешало . Сейчас так сделал и статический попробовал , и локальный массив - все работает отлично. Вопрос - нафига такую подставу программист оптибута сделал ? какая цель была так данные в ОЗУ класть?
1 лайк